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Lines Matching refs:tL

416    HReg tL   = newVRegI(env);
419    /* tL = irrm << 1;
421       tL &= 2;
423       t3 = tL | tR;
430    addInstr(env, ARM64Instr_Shift(tL, irrm, ARM64RI6_I6(1), ARM64sh_SHL));
432    addInstr(env, ARM64Instr_Logic(tL, tL, ril_two, ARM64lo_AND));
434    addInstr(env, ARM64Instr_Logic(t3, tL, ARM64RIL_R(tR), ARM64lo_OR));