Lines Matching full:regd
3722 UInt regD = dregEnc(i->ARMin.VCvtID.dst);
3723 UInt insn = XXXXXXXX(0xE, X1110, X1011, X1000, regD,
3732 UInt regD = dregEnc(i->ARMin.VCvtID.dst);
3733 UInt insn = XXXXXXXX(0xE, X1110, X1011, X1000, regD,
3741 UInt regD = dregEnc(i->ARMin.VCvtID.src);
3745 X1011, X0100, regD);
3751 UInt regD = dregEnc(i->ARMin.VCvtID.src);
3755 X1011, X0100, regD);
3790 UInt regD = qregEnc(i->ARMin.NLdStQ.dQ) << 1;
3792 UInt D = regD >> 4;
3796 regD &= 0xF;
3805 regN, regD, X1010, X1000, regM);
3810 UInt regD = dregEnc(i->ARMin.NLdStD.dD);
3812 UInt D = regD >> 4;
3816 regD &= 0xF;
3825 regN, regD, X0111, X1000, regM);
3831 UInt regD, D;
3844 regD = (hregClass(i->ARMin.NUnaryS.dst->reg) == HRcVec128)
3850 D = regD >> 4;
3852 regD &= 0xf;
3855 (i->ARMin.NUnaryS.size & 0xf), regD,
3860 regD = Q ? (qregEnc(i->ARMin.NUnaryS.dst->reg) << 1) :
3864 D = regD >> 4;
3866 regD &= 0xF;
3891 regD, regM, X1011,
3898 regD = iregEnc(i->ARMin.NUnaryS.dst->reg);
3900 D = regD >> 4;
3902 regD &= 0xF;
3932 regM, regD, X1011,
3939 regD = iregEnc(i->ARMin.NUnaryS.dst->reg);
3941 D = regD >> 4;
3943 regD &= 0xF;
3980 regM, regD, X1011,
3990 UInt regD = (hregClass(i->ARMin.NUnary.dst) == HRcVec128)
3994 UInt D = regD >> 4;
4009 regD &= 0xF;
4013 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regM, regD, X0001,
4016 case ARMneon_COPYN: /* VMOVN regD, regQ */
4018 regD, X0010, BITS4(0,0,M,0), regM);
4020 case ARMneon_COPYQNSS: /* VQMOVN regD, regQ */
4022 regD, X0010, BITS4(1,0,M,0), regM);
4024 case ARMneon_COPYQNUS: /* VQMOVUN regD, regQ */
4026 regD, X0010, BITS4(0,1,M,0), regM);
4028 case ARMneon_COPYQNUU: /* VQMOVN regD, regQ */
4030 regD, X0010, BITS4(1,1,M,0), regM);
4032 case ARMneon_COPYLS: /* VMOVL regQ, regD */
4038 regD, X1010, BITS4(0,0,M,1), regM);
4040 case ARMneon_COPYLU: /* VMOVL regQ, regD */
4046 regD, X1010, BITS4(0,0,M,1), regM);
4049 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X0000, regD, X0101,
4054 regD, BITS4(0,F,0,1), BITS4(0,Q,M,0), regM);
4057 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X0000, regD, X0101,
4062 regD, X0100, BITS4(1,Q,M,0), regM);
4066 regD, X0100, BITS4(0,Q,M,0), regM);
4070 regD, X0011, BITS4(0,Q,M,0), regM);
4076 insn = XXXXXXXX(0xE, X1110, BITS4(1, sz1, Q, 0), regD, regM,
4081 regD, BITS4(0,0,0,1), BITS4(0,Q,M,0), regM);
4085 regD, BITS4(0,0,0,0), BITS4(1,Q,M,0), regM);
4089 regD, BITS4(0,0,0,0), BITS4(0,Q,M,0), regM);
4093 regD, X0010, BITS4(1,Q,M,0), regM);
4097 regD, X0010, BITS4(0,Q,M,0), regM);
4102 sz & 0xf, regD, X0111,
4108 sz & 0xf, regD, X0111,
4114 sz & 0xf, regD, X0110,
4118 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0111,
4122 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0111,
4126 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0110,
4130 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0110,
4138 BITS4(1,D,sz1,sz2), sz, regD, X1111,
4146 BITS4(1,D,sz1,sz2), sz, regD, X1111,
4154 BITS4(1,D,sz1,sz2), sz, regD, X1110,
4162 BITS4(1,D,sz1,sz2), sz, regD, X1110,
4166 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X0110, regD, X0110,
4170 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X0110, regD, X0111,
4174 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0100,
4178 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0101,
4182 regD, X0111,
4186 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0101,
4190 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0100,
4194 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1001, regD, X0111,
4206 UInt regD = (hregClass(i->ARMin.NDual.arg1) == HRcVec128)
4212 UInt D = regD >> 4;
4217 regD &= 0xF;
4222 regD, X0000, BITS4(1,Q,M,0), regM);
4226 regD, X0001, BITS4(1,Q,M,0), regM);
4230 regD, X0001, BITS4(0,Q,M,0), regM);
4240 UInt regD = (hregClass(i->ARMin.NBinary.dst) == HRcVec128)
4251 UInt D = regD >> 4;
4255 regD &= 0xF;
4260 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD, X0001,
4264 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regN, regD, X0001,
4268 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD, X0001,
4272 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4276 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4280 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4284 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4288 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4292 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4296 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4300 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4304 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4308 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4312 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4316 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4320 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4324 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4328 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4332 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4336 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4342 insn = XXXXXXXX(0xF, X0010, BITS4(1,D,1,1), regN, regD,
4347 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4351 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,sz1,sz2), regN, regD,
4355 insn = XXXXXXXX(0xF, X0010, BITS4(1,D,sz1,sz2), regN, regD,
4359 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4363 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD,
4367 insn = XXXXXXXX(0xF, X0010, BITS4(1,D,sz1,sz2), regN, regD,
4371 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4375 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4379 insn = XXXXXXXX(0xF, X0010, BITS4(1,D,sz1,sz2), regN, regD,
4383 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), regN, regD,
4387 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4391 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD,
4395 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4399 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4403 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4407 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4411 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD,
4415 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regN, regD,
4419 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,1,0), regN, regD,
4423 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regN, regD,
4427 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD,
4431 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,1,0), regN, regD,
4435 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD,
4439 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD, X1111,
4443 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,1,0), regN, regD, X1110,
4447 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD, X1110,
4451 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD, X1110,
4455 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regN, regD, X1111,
4466 UInt regD = (hregClass(i->ARMin.NShift.dst) == HRcVec128)
4477 UInt D = regD >> 4;
4481 regD &= 0xF;
4486 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4490 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4494 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,sz1,sz2), regN, regD,
4498 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,sz1,sz2), regN, regD,
4514 UInt regD = dregEnc(regDreg);
4516 UInt D = (regD >> 4) & 1;
4517 UInt Vd = regD & 0xF;
4529 UInt regD = Q ? (qregEnc(i->ARMin.NeonImm.dst) << 1) :
4531 UInt D = regD >> 4;
4539 regD &= 0xF;
4570 insn = XXXXXXXX(0xF, BITS4(0,0,1,j), BITS4(1,D,0,0), imm3, regD,
4594 UInt regD = iregEnc(i->ARMin.Add32.rD);
4597 vassert(regD != regN);
4598 /* MOV regD, imm32 */
4599 p = imm32_to_ireg((UInt *)p, regD, imm32);
4600 /* ADD regD, regN, regD */
4601 UInt insn = XXXXXXXX(0xE, 0, X1000, regN, regD, 0, 0, regD);
