Lines Matching full:r11
64 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
295 vex_printf("move r11, 0x%x,", (UInt)instr->GXin.XDirect.dstGA);
296 vex_printf("; st r11, ");
298 vex_printf("; move r11, $disp_cp_chain_me_to_%sEP; jalr r11; nop}",
308 vex_printf("; move r11, $disp_indir; jalr r11; nop}");
320 vex_printf("; move r11, $disp_assisted; jalr r11; nop; }");
324 vex_printf("(evCheck) ld r11, ");
326 vex_printf("; addli r11, r11, -1");
327 vex_printf("; st r11, ");
329 vex_printf("; bgez r11, nofail; jalr *");
334 vex_printf("(profInc) move r11, ($NotKnownYet); "
335 "ld r8, r11; "
337 "st r11, r8; " );
2054 UInt r_dst = 11; /* using r11 as address temporary */
2107 /* move r11, dstGA */
2108 /* st amPC, r11 */
2120 /* jr r11 */
2126 /* jalr r11 */
2139 /* ld r11, COND_OFFSET(GuestSP=r50)
2140 beqz r11, delta
2180 /* move r11, VG_(disp_cp_xindir), 4 bundles. */
2181 /* jalr r11 */
2196 /* ld r11, COND_OFFSET($GuestSP)
2197 beqz r11, delta */
2284 /* move r11, VG_(disp_cp_xassisted) */
2288 /* jalr r11
2300 /* ld r11, COND_OFFSET($GuestSP)
2301 beqz r11, delta
2316 ld r11, amCounter
2317 addi r11, r11, -1
2318 st amCounter, r11
2319 bgez r11, nofail
2320 ld r11, amFailAddr
2321 jalr r11
2326 /* ld r11, amCounter */
2330 /* addi r11,r11,-1 */
2352 /* jalr r11 */
2372 move r11, 0x6555655565556555ULL
2373 ld r51, r11
2375 st r11, r51
2378 /* move r11, 0x6555655565556555ULL */
2381 /* ld r51, r11 */
2389 /* st r11, r51 */
2513 move r11, disp_cp_chain_me_to_EXPECTED
2514 jalr r11
2518 jalr r11
2534 move r11, place_to_jump_to
2535 jalr r11
2539 jalr r11
2572 move r11, place_to_jump_to_EXPECTED
2573 jalr r11
2577 jalr r11
2584 move r11, disp_cp_chain_me
2585 jalr r11
2589 jalr r11
