Lines Matching full:ldrsw
178 TESTINST2_hide2("ldrsw x21, [x22, #24]", AREA_MID, x21,x22,0);
186 TESTINST2_hide2("ldrsw x21, [x22, #-24]!", AREA_MID, x21,x22,0);
192 TESTINST2_hide2("ldrsw x21, [x22], #-24", AREA_MID, x21,x22,0);
200 TESTINST2_hide2("ldrsw x21, [x22, #-24]", AREA_MID, x21,x22,0);
215 TESTINST3_hide2and3("ldrsw x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
216 TESTINST3_hide2and3("ldrsw x21, [x22,x23, lsl #2]", AREA_MID, 5, x21,x22,x23,0);
217 TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
218 TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #2]", AREA_MID, 5, x21,x22,x23,0);
219 TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
220 TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #2]", AREA_MID, -5ULL, x21,x22,x23,0);
490 MEM_TEST("ldrsw x13, [x5, #24]", -16, 4);
498 MEM_TEST("ldrsw x13, [x5, #-24]!", -16, 4);
504 MEM_TEST("ldrsw x13, [x5], #-24", -16, 4);
512 MEM_TEST("ldrsw x13, [x5, #-24]", -16, 4);
627 MEM_TEST("ldrsw x13, [x5,x6]", 12, -4);
628 MEM_TEST("ldrsw x13, [x5,x6, lsl #2]", 12, -4);
629 MEM_TEST("ldrsw x13, [x5,w6,uxtw #0]", 12, 4);
630 MEM_TEST("ldrsw x13, [x5,w6,uxtw #2]", 12, 4);
631 MEM_TEST("ldrsw x13, [x5,w6,sxtw #0]", 12, 4);
632 MEM_TEST("ldrsw x13, [x5,w6,sxtw #2]", 12, -4);
