Lines Matching full:immediate
364 // The worst case for size is mov 64-bit immediate to sp:
376 // 4. 32-bit orr immediate.
377 // 5. 64-bit orr immediate.
384 // Try to move the immediate in one instruction, and if that fails, switch to
392 // Generic immediate case. Imm will be represented by
461 // Immediate can be represented in a move zero instruction. Movz can't write
468 // Immediate can be represented in a move negative instruction. Movn can't
475 // Immediate can be represented in a logical orr instruction.
708 // The worst case for size is logical immediate to sp:
716 int64_t immediate = operand.immediate();
719 // If the operation is NOT, invert the operation and immediate.
722 immediate = ~immediate;
725 // Ignore the top 32 bits of an immediate if we're moving to a W register.
728 VIXL_ASSERT(((immediate >> kWRegSize) == 0) ||
729 ((immediate >> kWRegSize) == -1));
730 immediate &= kWRegMask;
733 VIXL_ASSERT(rd.Is64Bits() || is_uint32(immediate));
736 if (immediate == 0) {
753 } else if ((rd.Is64Bits() && (immediate == -1)) ||
754 (rd.Is32Bits() && (immediate == 0xffffffff))) {
760 Mov(rd, immediate);
775 if (IsImmLogical(immediate, reg_size, &n, &imm_s, &imm_r)) {
776 // Immediate can be encoded in the instruction.
779 // Immediate can't be encoded: synthesize using move immediate.
781 Operand imm_operand = MoveImmediateForShiftedOp(temp, immediate);
817 // The worst case for size is mov immediate with up to 4 instructions.
822 Mov(rd, operand.immediate());
913 // Immediate is of the form 0x00MMFFFF.
919 // Immediate is of the form 0x0000MMFF.
925 // Immediate is of the form 0xFFMM0000.
930 // Immediate is of the form 0xFFFFMM00.
998 // 8-bit immediate.
1002 // 16-bit immediate.
1005 // 32-bit immediate.
1008 // 64-bit immediate.
1029 // The worst case for size is mvn immediate with up to 4 instructions.
1034 Mvn(rd, operand.immediate());
1064 if (operand.IsImmediate() && (operand.immediate() < 0)) {
1065 ConditionalCompareMacro(rn, -operand.immediate(), nzcv, cond, CCMN);
1077 if (operand.IsImmediate() && (operand.immediate() < 0)) {
1078 ConditionalCompareMacro(rn, -operand.immediate(), nzcv, cond, CCMP);
1091 // The worst case for size is ccmp immediate:
1097 (operand.IsImmediate() && IsImmConditionalCompare(operand.immediate()))) {
1098 // The immediate can be encoded in the instruction, or the operand is an
1120 // The worst case for size is csel immediate:
1126 // Immediate argument. Handle special cases of 0, 1 and -1 using zero
1128 int64_t imm = operand.immediate();
1139 Mov(temp, operand.immediate());
1160 if (operand.IsImmediate() && (operand.immediate() < 0) &&
1161 IsImmAddSub(-operand.immediate())) {
1162 AddSubMacro(rd, rn, -operand.immediate(), S, SUB);
1181 if (operand.IsImmediate() && (operand.immediate() < 0) &&
1182 IsImmAddSub(-operand.immediate())) {
1183 AddSubMacro(rd, rn, -operand.immediate(), S, ADD);
1301 Mov(rd, -operand.immediate());
1325 // Encode the immediate in a single move instruction, if possible.
1329 // Pre-shift the immediate to the least-significant bits of the register.
1333 // Pre-shift the immediate to the most-significant bits of the register,
1339 // The new immediate has been moved into the destination's low bits:
1343 // The new immediate has been moved into the destination's high bits:
1382 // Worst case is add/sub immediate:
1393 if ((operand.IsImmediate() && !IsImmAddSub(operand.immediate())) ||
1400 MoveImmediateForShiftedOp(temp, operand.immediate());
1466 // Worst case is addc/subc immediate:
1474 // Add/sub with carry (immediate or ROR shifted register.)
1529 // Check if an immediate offset fits in the immediate field of the
1534 // Immediate offset that can't be encoded using unsigned or unscaled
1571 // Worst case is ldp/stp immediate:
1580 // Check if the offset fits in the immediate field of the appropriate
1613 // Check if an immediate offset fits in the immediate field of the
1618 // Immediate offset that can't be encoded using unsigned or unscaled
1865 VIXL_ASSERT(offset.immediate() >= 0);
1875 VIXL_ASSERT(offset.immediate() >= 0);
1890 VIXL_ASSERT(size.immediate() > 0);
1892 VIXL_ASSERT((size.immediate() % 16) == 0);
1912 VIXL_ASSERT(size.immediate() > 0);
1914 VIXL_ASSERT((size.immediate() % 16) == 0);
2048 // the assembler directly here. However, this means that large immediate
