Lines Matching full:imm1
175 const VRegister& vd, int imm1, const VRegister& vn, int imm2);2404 for (unsigned imm1 = 0; imm1 < inputs_imm1_length; imm1++) {2414 (imm1 * inputs_imm2_length * vd_lane_count) +2436 (imm1 * inputs_imm2_length * vd_lane_count) +2440 unsigned input_index_imm1 = imm1;