Lines Matching full:supports
72 * CPU supports the VFPv2 instruction set. Many, but not all, ARMv6 CPUs
77 * CPU supports the ARMv7-A basic instruction set.
81 * CPU supports the VFPv3-D16 instruction set, providing hardware FPU
93 * CPU FPU supports "ARM Advanced SIMD" instructions, also known as
99 * supports instructions to perform floating-point operations on
126 * CPU supports AES instructions. These instructions are only
130 * CPU supports CRC32 instructions. These instructions are only
134 * CPU supports SHA2 instructions. These instructions are only
138 * CPU supports SHA1 instructions. These instructions are only
142 * CPU supports 64-bit PMULL and PMULL2 instructions. These
161 * This should be generic code that runs on any CPU that supports the
162 * 'armeabi-v7a' Android ABI. Note that no ARMv6 CPU supports this.
232 * CPU supports AES instructions.
235 * CPU supports CRC32 instructions.
238 * CPU supports SHA2 instructions.
241 * CPU supports SHA1 instructions.
244 * CPU supports 64-bit PMULL and PMULL2 instructions.
274 * supports obsoleted R1..R5 instructions only via kernel traps.
277 * CPU supports Mips SIMD Architecture instructions.
