Lines Matching full:immediate
353 immediate operand to ease the operand encoding/decoding and qualifier
1250 /* Add/subtract (immediate). */
1364 /* AdvSIMD modified immediate. */
1548 /* AdvSIMD shift by immediate. */
1730 /* AdvSIMD scalar shift by immediate. */
1773 /* Unconditional branch (immediate). */
1782 /* Compare & branch (immediate). */
1785 /* Conditional branch (immediate). */
1787 /* Conditional compare (immediate). */
1933 /* Floating-point immediate. */
1937 /* Load/store register (immediate indexed). */
1949 /* Load/store register (unsigned immediate). */
1985 /* Load/store register (unscaled immediate). */
2043 /* Logical (immediate). */
2237 /* Move wide (immediate). */
2267 /* Test & branch (immediate). */
2362 Y(IMMEDIATE, imm, "IDX", 0, F(FLD_imm4), \
2363 "an immediate as the index of the least significant byte") \
2364 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSL", 0, F(), \
2366 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSR", 0, F(), \
2368 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM", 0, F(), \
2369 "an immediate") \
2370 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM_SFT", 0, F(), \
2371 "an 8-bit unsigned immediate with optional shift") \
2372 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_FPIMM", 0, F(), \
2374 X(IMMEDIATE, 0, ext_shll_imm, "SHLL_IMM", 0, F(), \
2375 "an immediate shift amount of 8, 16 or 32") \
2376 X(IMMEDIATE, 0, 0, "IMM0", 0, F(), "0") \
2377 X(IMMEDIATE, 0, 0, "FPIMM0", 0, F(), "0.0") \
2378 Y(IMMEDIATE, imm, "FPIMM", 0, F(FLD_imm8), \
2380 Y(IMMEDIATE, imm, "IMMR", 0, F(FLD_immr), \
2382 Y(IMMEDIATE, imm, "IMMS", 0, F(FLD_imm6), \
2384 Y(IMMEDIATE, imm, "WIDTH", 0, F(FLD_imm6), \
2386 Y(IMMEDIATE, imm, "IMM", 0, F(FLD_imm6), "an immediate") \
2387 Y(IMMEDIATE, imm, "UIMM3_OP1", 0, F(FLD_op1), \
2388 "a 3-bit unsigned immediate") \
2389 Y(IMMEDIATE, imm, "UIMM3_OP2", 0, F(FLD_op2), \
2390 "a 3-bit unsigned immediate") \
2391 Y(IMMEDIATE, imm, "UIMM4", 0, F(FLD_CRm), \
2392 "a 4-bit unsigned immediate") \
2393 Y(IMMEDIATE, imm, "UIMM7", 0, F(FLD_CRm, FLD_op2), \
2394 "a 7-bit unsigned immediate") \
2395 Y(IMMEDIATE, imm, "BIT_NUM", 0, F(FLD_b5, FLD_b40), \
2397 Y(IMMEDIATE, imm, "EXCEPTION", 0, F(FLD_imm16), \
2398 "a 16-bit unsigned immediate") \
2399 Y(IMMEDIATE, imm, "CCMP_IMM", 0, F(FLD_imm5), \
2400 immediate") \
2401 Y(IMMEDIATE, imm, "NZCV", 0, F(FLD_nzcv), \
2403 Y(IMMEDIATE, limm, "LIMM", 0, F(FLD_N,FLD_immr,FLD_imms), \
2404 "Logical immediate") \
2405 Y(IMMEDIATE, aimm, "AIMM", 0, F(FLD_shift,FLD_imm12), \
2406 "a 12-bit unsigned immediate with optional left shift of 12 bits")\
2407 Y(IMMEDIATE, imm_half, "HALF", 0, F(FLD_imm16), \
2408 "a 16-bit immediate with optional left shift") \
2409 Y(IMMEDIATE, fbits, "FBITS", 0, F(FLD_scale), \
2411 X(IMMEDIATE, 0, 0, "IMM_MOV", 0, F(), "an immediate") \
2430 "an address with 7-bit signed immediate offset") \
2432 "an address with 9-bit signed immediate offset") \
2434 "an address with 9-bit negative or unaligned immediate offset") \
2436 "an address with scaled, unsigned immediate offset") \
2440 "a post-indexed address with immediate or register increment") \
2455 "the ISB option name SY or an optional 4-bit unsigned immediate") \
