Lines Matching full:opc4
162 /* opc4 c4 dispe9 */ \
164 /* opc4 c4 disps17 */ \
166 /* opc4 c4 disps25 */ \
294 #define CSTBIT_INST_B(NAME, OP, OPC1, OPC2, OPC3, OPC4) \
302 {NAME, 2, OPC4, 22, CSTBIT_INS, {{OP,4},{rpindex_disps14,0}}}, \
319 #define CSTBIT_INST_W(NAME, OP, OPC1, OPC2, OPC3, OPC4) \
327 {NAME, 2, OPC4, 22, CSTBIT_INS, {{OP,4},{rpindex_disps14,0}}}, \
350 #define LD_REG_INST(NAME, OPC1, OPC2, OPC3, OPC4, OPC5, OP_S, OP_D) \
357 /* opc4 reg disps4(RPbase) */ \
362 {NAME, 2, OPC4, 22, LD_STOR_INS, {{rpindex_disps14,0}, {OP_D,20}}}, \
381 #define ST_REG_INST(NAME, OPC1, OPC2, OPC3, OPC4, OPC5, OP_D, OP_S) \
388 /* opc4 reg disps4(RPbase) */ \
393 {NAME, 2, OPC4, 22, LD_STOR_INS, {{OP_S,20}, {rpindex_disps14,0}}}, \
409 #define ST_IMM_INST(NAME, OPC1, OPC2, OPC3, OPC4) \
417 {NAME, 2, OPC4, 22, LD_STOR_INS, {{uimm4,4},{rpindex_disps14,0}}}, \
