Lines Matching full:fld_val
540 unsigned int fld_val;
551 fld_val = tic6x_field_bits (opcode, field);
563 func_unit_side = (fld_val ? 2 : 1);
574 func_unit_data_side = (fld_val ? 2 : 1);
587 func_unit_cross = fld_val;
593 t_val = fld_val;
806 unsigned int fld_val;
819 fld_val = tic6x_field_bits (opcode, field);
823 (fld_val == 0x00) && (fld_val = 0x10);
824 (fld_val == 0x07) && (fld_val = 0x08);
836 snprintf (operands[op_num], 24, "%u", fld_val);
840 mem_offset = fld_val;
852 snprintf (operands[op_num], 24, "%u", fld_val << 16);
857 if (fld_val == 0)
863 signed_fld_val = (signed int) fld_val;
872 signed_fld_val = (signed int) fld_val;
880 snprintf (operands[op_num], 24, "%u", fld_val + 1);
885 signed_fld_val = (signed int) fld_val;
902 (func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1),
903 (func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1) - 1);
908 operands_addresses[op_num] = fp_addr + 2 * fld_val;
912 fld_val <<= 1;
929 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
935 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
941 snprintf (operands[op_num], 24, "%c%u", reg_side, fld_val);
946 snprintf (operands[op_num], 24, "b%u", reg_base + fld_val);
951 snprintf (operands[op_num], 24, "b%u", fld_val);
957 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
963 snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val);
968 if (fld_val & 1)
972 reg_side, reg_base + fld_val + 1,
973 reg_side, reg_base + fld_val);
978 if (fld_val & 1)
982 reg_side, reg_base + fld_val + 1,
983 reg_side, reg_base + fld_val);
993 if (fld_val & 1)
997 reg_side, reg_base + fld_val + 1,
998 reg_side, reg_base + fld_val);
1003 if (fld_val & 1)
1007 reg_side, reg_base + fld_val + 1,
1008 reg_side, reg_base + fld_val);
1014 snprintf (operands[op_num], 24, "*%c%u", reg_side, reg_base + fld_val);
1019 mem_base_reg = fld_val;
1035 if (fld_val > 0x3u)
1038 opcode, op_num, fld_val);
1041 mem_base_reg = 0x4 | fld_val;
1058 fld_val ? 15u : 14u);
1062 mem_base_reg = fld_val ? 15u : 14u;
1074 fld_val += 1;
1077 mem_offset = fld_val;
1097 mem_mode = fld_val;
1102 mem_scaled = fld_val;
1107 crlo = fld_val;
1112 crhi = fld_val;
1254 t = (t << 1) | ((fld_val >> i) & 1);
1262 fld_val & ((1 << fcyc_bits) - 1));
1267 if (fld_val == 0)
1277 if (fld_val & (1 << i))
