Lines Matching full:imm16
343 /* 0000 0001 0000 dddd imm16 *** add rd,imm16 */
346 "add rd,imm16",16,7,0x3c,
463 /* 0000 0111 0000 dddd imm16 *** and rd,imm16 */
466 "and rd,imm16",16,7,0x18,
783 /* 0000 1101 ddN0 0001 imm16 *** cp @rd,imm16 */
786 "cp @rd,imm16",16,11,0x3c,
791 /* 0100 1101 ddN0 0001 address_dst imm16 *** cp address_dst(rd),imm16 */
794 "cp address_dst(rd),imm16",16,15,0x3c,
799 /* 0100 1101 0000 0001 address_dst imm16 *** cp address_dst,imm16 */
802 "cp address_dst,imm16",16,14,0x3c,
831 /* 0000 1011 0000 dddd imm16 *** cp rd,imm16 */
834 "cp rd,imm16",16,7,0x3c,
1191 /* 0001 1011 0000 dddd imm16 *** div rrd,imm16 */
1194 "div rrd,imm16",16,107,0x3c,
1399 /* 0011 1011 dddd 0100 imm16 *** in rd,imm16 */
1402 "in rd,imm16",16,12,0x00,
1415 /* 0011 1010 dddd 0100 imm16 *** inb rbd,imm16 */
1418 "inb rbd,imm16",8,10,0x00,
1591 /* 0000 1101 ddN0 0101 imm16 *** ld @rd,imm16 */
1594 "ld @rd,imm16",16,7,0x00,
1607 /* 0100 1101 ddN0 0101 address_dst imm16 *** ld address_dst(rd),imm16 */
1610 "ld address_dst(rd),imm16",16,15,0x00,
1623 /* 0100 1101 0000 0101 address_dst imm16 *** ld address_dst,imm16 */
1626 "ld address_dst,imm16",16,14,0x00,
1639 /* 0011 0011 ddN0 ssss imm16 *** ld rd(imm16),rs */
1642 "ld rd(imm16),rs",16,14,0x00,
1679 /* 0010 0001 0000 dddd imm16 *** ld rd,imm16 */
1682 "ld rd,imm16",16,7,0x00,
1695 /* 0011 0001 ssN0 dddd imm16 *** ld rd,rs(imm16) */
1698 "ld rd,rs(imm16)",16,14,0x00,
1727 /* 0011 0100 ssN0 dddd imm16 *** lda prd,rs(imm16) */
1730 "lda prd,rs(imm16)",16,15,0x00,
1847 /* 0011 0000 ssN0 dddd imm16 *** ldb rbd,rs(imm16) */
1850 "ldb rbd,rs(imm16)",8,14,0x00,
1863 /* 0011 0010 ddN0 ssss imm16 *** ldb rd(imm16),rbs */
1866 "ldb rd(imm16),rbs",8,14,0x00,
2007 /* 0011 0111 ddN0 ssss imm16 *** ldl rd(imm16),rrs */
2010 "ldl rd(imm16),rrs",32,17,0x00,
2063 /* 0011 0101 ssN0 dddd imm16 *** ldl rrd,rs(imm16) */
2066 "ldl rrd,rs(imm16)",32,17,0x00,
2255 /* 0001 1001 0000 dddd imm16 *** mult rrd,imm16 */
2258 "mult rrd,imm16",16,70,0x3c,
2407 /* 0000 0101 0000 dddd imm16 *** or rd,imm16 */
2410 "or rd,imm16",16,7,0x38,
2503 /* 0011 1011 ssss 0110 imm16 *** out imm16,rs */
2506 "out imm16,rs",16,12,0x00,
2519 /* 0011 1010 ssss 0110 imm16 *** outb imm16,rbs */
2522 "outb imm16,rbs",8,12,0x00,
2647 /* 0000 1101 ddN0 1001 imm16 *** push @rd,imm16 */
2650 "push @rd,imm16",16,12,0x00,
3095 /* 0011 1011 dddd 0101 imm16 *** sin rd,imm16 */
3098 "sin rd,imm16",16,12,0x00,
3103 /* 0011 1010 dddd 0101 imm16 *** sinb rbd,imm16 */
3106 "sinb rbd,imm16",8,10,0x00,
3255 /* 0011 1011 ssss 0110 imm16 *** sout imm16,rs */
3258 "sout imm16,rs",16,12,0x00,
3263 /* 0011 1010 ssss 0110 imm16 *** soutb imm16,rbs */
3266 "soutb imm16,rbs",8,12,0x00,
3375 /* 0000 0011 0000 dddd imm16 *** sub rd,imm16 */
3378 "sub rd,imm16",16,7,0x3c,
3735 /* 0000 1001 0000 dddd imm16 *** xor rd,imm16 */
3738 "xor rd,imm16",16,7,0x18,
