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      1 /* MIPS ELF support for BFD.
      2    Copyright (C) 1993-2014 Free Software Foundation, Inc.
      3 
      4    By Ian Lance Taylor, Cygnus Support, <ian (at) cygnus.com>, from
      5    information in the System V Application Binary Interface, MIPS
      6    Processor Supplement.
      7 
      8    This file is part of BFD, the Binary File Descriptor library.
      9 
     10    This program is free software; you can redistribute it and/or modify
     11    it under the terms of the GNU General Public License as published by
     12    the Free Software Foundation; either version 3 of the License, or
     13    (at your option) any later version.
     14 
     15    This program is distributed in the hope that it will be useful,
     16    but WITHOUT ANY WARRANTY; without even the implied warranty of
     17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     18    GNU General Public License for more details.
     19 
     20    You should have received a copy of the GNU General Public License
     21    along with this program; if not, write to the Free Software
     22    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
     23    MA 02110-1301, USA.  */
     24 
     25 /* This file holds definitions specific to the MIPS ELF ABI.  Note
     26    that most of this is not actually implemented by BFD.  */
     27 
     28 #ifndef _ELF_MIPS_H
     29 #define _ELF_MIPS_H
     30 
     31 #include "elf/reloc-macros.h"
     32 
     33 /* Relocation types.  */
     34 START_RELOC_NUMBERS (elf_mips_reloc_type)
     35   RELOC_NUMBER (R_MIPS_NONE, 0)
     36   RELOC_NUMBER (R_MIPS_16, 1)
     37   RELOC_NUMBER (R_MIPS_32, 2)		/* In Elf 64: alias R_MIPS_ADD */
     38   RELOC_NUMBER (R_MIPS_REL32, 3)	/* In Elf 64: alias R_MIPS_REL */
     39   RELOC_NUMBER (R_MIPS_26, 4)
     40   RELOC_NUMBER (R_MIPS_HI16, 5)
     41   RELOC_NUMBER (R_MIPS_LO16, 6)
     42   RELOC_NUMBER (R_MIPS_GPREL16, 7)	/* In Elf 64: alias R_MIPS_GPREL */
     43   RELOC_NUMBER (R_MIPS_LITERAL, 8)
     44   RELOC_NUMBER (R_MIPS_GOT16, 9)	/* In Elf 64: alias R_MIPS_GOT */
     45   RELOC_NUMBER (R_MIPS_PC16, 10)
     46   RELOC_NUMBER (R_MIPS_CALL16, 11)	/* In Elf 64: alias R_MIPS_CALL */
     47   RELOC_NUMBER (R_MIPS_GPREL32, 12)
     48   /* The remaining relocs are defined on Irix, although they are not
     49      in the MIPS ELF ABI.  */
     50   RELOC_NUMBER (R_MIPS_UNUSED1, 13)
     51   RELOC_NUMBER (R_MIPS_UNUSED2, 14)
     52   RELOC_NUMBER (R_MIPS_UNUSED3, 15)
     53   RELOC_NUMBER (R_MIPS_SHIFT5, 16)
     54   RELOC_NUMBER (R_MIPS_SHIFT6, 17)
     55   RELOC_NUMBER (R_MIPS_64, 18)
     56   RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
     57   RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
     58   RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
     59   RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
     60   RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
     61   RELOC_NUMBER (R_MIPS_SUB, 24)
     62   RELOC_NUMBER (R_MIPS_INSERT_A, 25)
     63   RELOC_NUMBER (R_MIPS_INSERT_B, 26)
     64   RELOC_NUMBER (R_MIPS_DELETE, 27)
     65   RELOC_NUMBER (R_MIPS_HIGHER, 28)
     66   RELOC_NUMBER (R_MIPS_HIGHEST, 29)
     67   RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
     68   RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
     69   RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
     70   RELOC_NUMBER (R_MIPS_REL16, 33)
     71   RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
     72   RELOC_NUMBER (R_MIPS_PJUMP, 35)
     73   RELOC_NUMBER (R_MIPS_RELGOT, 36)
     74   RELOC_NUMBER (R_MIPS_JALR, 37)
     75   /* TLS relocations.  */
     76   RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
     77   RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
     78   RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
     79   RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
     80   RELOC_NUMBER (R_MIPS_TLS_GD, 42)
     81   RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
     82   RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
     83   RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
     84   RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
     85   RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
     86   RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
     87   RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
     88   RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
     89   RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
     90   /* Space to grow */
     91   RELOC_NUMBER (R_MIPS_PC21_S2, 60)
     92   RELOC_NUMBER (R_MIPS_PC26_S2, 61)
     93   RELOC_NUMBER (R_MIPS_PC18_S3, 62)
     94   RELOC_NUMBER (R_MIPS_PC19_S2, 63)
     95   RELOC_NUMBER (R_MIPS_PCHI16, 64)
     96   RELOC_NUMBER (R_MIPS_PCLO16, 65)
     97   FAKE_RELOC (R_MIPS_max, 66)
     98   /* These relocs are used for the mips16.  */
     99   FAKE_RELOC (R_MIPS16_min, 100)
    100   RELOC_NUMBER (R_MIPS16_26, 100)
    101   RELOC_NUMBER (R_MIPS16_GPREL, 101)
    102   RELOC_NUMBER (R_MIPS16_GOT16, 102)
    103   RELOC_NUMBER (R_MIPS16_CALL16, 103)
    104   RELOC_NUMBER (R_MIPS16_HI16, 104)
    105   RELOC_NUMBER (R_MIPS16_LO16, 105)
    106   RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
    107   RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
    108   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
    109   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
    110   RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
    111   RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
    112   RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
    113   FAKE_RELOC (R_MIPS16_max, 113)
    114   /* These relocations are specific to VxWorks.  */
    115   RELOC_NUMBER (R_MIPS_COPY, 126)
    116   RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
    117 
    118   /* These relocations are specific to microMIPS.  */
    119   FAKE_RELOC (R_MICROMIPS_min, 130)
    120   RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
    121   RELOC_NUMBER (R_MICROMIPS_HI16, 134)
    122   RELOC_NUMBER (R_MICROMIPS_LO16, 135)
    123   RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)	/* In Elf 64:
    124 						   alias R_MICROMIPS_GPREL */
    125   RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
    126   RELOC_NUMBER (R_MICROMIPS_GOT16, 138)		/* In Elf 64:
    127 						   alias R_MICROMIPS_GOT */
    128   RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
    129   RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
    130   RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
    131   RELOC_NUMBER (R_MICROMIPS_CALL16, 142)	/* In Elf 64:
    132 						   alias R_MICROMIPS_CALL */
    133   RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
    134   RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
    135   RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
    136   RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
    137   RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
    138   RELOC_NUMBER (R_MICROMIPS_SUB, 150)
    139   RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
    140   RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
    141   RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
    142   RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
    143   RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
    144   RELOC_NUMBER (R_MICROMIPS_JALR, 156)
    145   RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
    146   /* TLS relocations.  */
    147   RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
    148   RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
    149   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
    150   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
    151   RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
    152   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
    153   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
    154   /* microMIPS GP- and PC-relative relocations. */
    155   RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
    156   RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
    157   FAKE_RELOC (R_MICROMIPS_max, 174)
    158 
    159   /* This was a GNU extension used by embedded-PIC.  It was co-opted by
    160      mips-linux for exception-handling data.  GCC stopped using it in
    161      May, 2004, then started using it again for compact unwind tables.  */
    162   RELOC_NUMBER (R_MIPS_PC32, 248)
    163   RELOC_NUMBER (R_MIPS_EH, 249)
    164   /* FIXME: this relocation is used internally by gas.  */
    165   RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
    166   /* These are GNU extensions to enable C++ vtable garbage collection.  */
    167   RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
    168   RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
    169 END_RELOC_NUMBERS (R_MIPS_maxext)
    170 
    171 /* Processor specific flags for the ELF header e_flags field.  */
    172 
    173 /* At least one .noreorder directive appears in the source.  */
    174 #define EF_MIPS_NOREORDER	0x00000001
    175 
    176 /* File contains position independent code.  */
    177 #define EF_MIPS_PIC		0x00000002
    178 
    179 /* Code in file uses the standard calling sequence for calling
    180    position independent code.  */
    181 #define EF_MIPS_CPIC		0x00000004
    182 
    183 /* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */
    184 #define EF_MIPS_XGOT		0x00000008
    185 
    186 /* Code in file uses UCODE (obsolete) */
    187 #define EF_MIPS_UCODE		0x00000010
    188 
    189 /* Code in file uses new ABI (-n32 on Irix 6).  */
    190 #define EF_MIPS_ABI2		0x00000020
    191 
    192 /* Process the .MIPS.options section first by ld */
    193 #define EF_MIPS_OPTIONS_FIRST	0x00000080
    194 
    195 /* Indicates code compiled for a 64-bit machine in 32-bit mode
    196    (regs are 32-bits wide).  */
    197 #define EF_MIPS_32BITMODE	0x00000100
    198 
    199 /* 32-bit machine but FP registers are 64 bit (-mfp64).  */
    200 #define EF_MIPS_FP64		0x00000200
    201 
    202 /* Code in file uses the IEEE 754-2008 NaN encoding convention.  */
    203 #define EF_MIPS_NAN2008		0x00000400
    204 
    205 /* Architectural Extensions used by this file */
    206 #define EF_MIPS_ARCH_ASE	0x0f000000
    207 
    208 /* Use MDMX multimedia extensions */
    209 #define EF_MIPS_ARCH_ASE_MDMX	0x08000000
    210 
    211 /* Use MIPS-16 ISA extensions */
    212 #define EF_MIPS_ARCH_ASE_M16	0x04000000
    213 
    214 /* Use MICROMIPS ISA extensions.  */
    215 #define EF_MIPS_ARCH_ASE_MICROMIPS	0x02000000
    216 
    217 /* Four bit MIPS architecture field.  */
    218 #define EF_MIPS_ARCH		0xf0000000
    219 
    220 /* -mips1 code.  */
    221 #define E_MIPS_ARCH_1		0x00000000
    222 
    223 /* -mips2 code.  */
    224 #define E_MIPS_ARCH_2		0x10000000
    225 
    226 /* -mips3 code.  */
    227 #define E_MIPS_ARCH_3		0x20000000
    228 
    229 /* -mips4 code.  */
    230 #define E_MIPS_ARCH_4		0x30000000
    231 
    232 /* -mips5 code.  */
    233 #define E_MIPS_ARCH_5           0x40000000
    234 
    235 /* -mips32 code.  */
    236 #define E_MIPS_ARCH_32          0x50000000
    237 
    238 /* -mips64 code.  */
    239 #define E_MIPS_ARCH_64          0x60000000
    240 
    241 /* -mips32r2 code.  */
    242 #define E_MIPS_ARCH_32R2        0x70000000
    243 
    244 /* -mips64r2 code.  */
    245 #define E_MIPS_ARCH_64R2        0x80000000
    246 
    247 /* -mips32r6 code.  */
    248 #define E_MIPS_ARCH_32R6        0x90000000
    249 
    250 /* -mips64r6 code.  */
    251 #define E_MIPS_ARCH_64R6        0xa0000000
    252 
    253 /* The ABI of the file.  Also see EF_MIPS_ABI2 above. */
    254 #define EF_MIPS_ABI		0x0000F000
    255 
    256 /* The original o32 abi. */
    257 #define E_MIPS_ABI_O32          0x00001000
    258 
    259 /* O32 extended to work on 64 bit architectures */
    260 #define E_MIPS_ABI_O64          0x00002000
    261 
    262 /* EABI in 32 bit mode */
    263 #define E_MIPS_ABI_EABI32       0x00003000
    264 
    265 /* EABI in 64 bit mode */
    266 #define E_MIPS_ABI_EABI64       0x00004000
    267 
    268 
    269 /* Machine variant if we know it.  This field was invented at Cygnus,
    270    but it is hoped that other vendors will adopt it.  If some standard
    271    is developed, this code should be changed to follow it. */
    272 
    273 #define EF_MIPS_MACH		0x00FF0000
    274 
    275 /* Cygnus is choosing values between 80 and 9F;
    276    00 - 7F should be left for a future standard;
    277    the rest are open. */
    278 
    279 #define E_MIPS_MACH_3900	0x00810000
    280 #define E_MIPS_MACH_4010	0x00820000
    281 #define E_MIPS_MACH_4100	0x00830000
    282 #define E_MIPS_MACH_4650	0x00850000
    283 #define E_MIPS_MACH_4120	0x00870000
    284 #define E_MIPS_MACH_4111	0x00880000
    285 #define E_MIPS_MACH_SB1         0x008a0000
    286 #define E_MIPS_MACH_OCTEON	0x008b0000
    287 #define E_MIPS_MACH_XLR     	0x008c0000
    288 #define E_MIPS_MACH_OCTEON2	0x008d0000
    289 #define E_MIPS_MACH_OCTEON3	0x008e0000
    290 #define E_MIPS_MACH_5400	0x00910000
    291 #define E_MIPS_MACH_5900	0x00920000
    292 #define E_MIPS_MACH_5500	0x00980000
    293 #define E_MIPS_MACH_9000	0x00990000
    294 #define E_MIPS_MACH_LS2E        0x00A00000
    295 #define E_MIPS_MACH_LS2F        0x00A10000
    296 #define E_MIPS_MACH_LS3A        0x00A20000
    297 
    298 /* Processor specific section indices.  These sections do not actually
    300    exist.  Symbols with a st_shndx field corresponding to one of these
    301    values have a special meaning.  */
    302 
    303 /* Defined and allocated common symbol.  Value is virtual address.  If
    304    relocated, alignment must be preserved.  */
    305 #define SHN_MIPS_ACOMMON	SHN_LORESERVE
    306 
    307 /* Defined and allocated text symbol.  Value is virtual address.
    308    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
    309 #define SHN_MIPS_TEXT		(SHN_LORESERVE + 1)
    310 
    311 /* Defined and allocated data symbol.  Value is virtual address.
    312    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
    313 #define SHN_MIPS_DATA		(SHN_LORESERVE + 2)
    314 
    315 /* Small common symbol.  */
    316 #define SHN_MIPS_SCOMMON	(SHN_LORESERVE + 3)
    317 
    318 /* Small undefined symbol.  */
    319 #define SHN_MIPS_SUNDEFINED	(SHN_LORESERVE + 4)
    320 
    321 /* Processor specific section types.  */
    323 
    324 /* Section contains the set of dynamic shared objects used when
    325    statically linking.  */
    326 #define SHT_MIPS_LIBLIST	0x70000000
    327 
    328 /* I'm not sure what this is, but it's used on Irix 5.  */
    329 #define SHT_MIPS_MSYM		0x70000001
    330 
    331 /* Section contains list of symbols whose definitions conflict with
    332    symbols defined in shared objects.  */
    333 #define SHT_MIPS_CONFLICT	0x70000002
    334 
    335 /* Section contains the global pointer table.  */
    336 #define SHT_MIPS_GPTAB		0x70000003
    337 
    338 /* Section contains microcode information.  The exact format is
    339    unspecified.  */
    340 #define SHT_MIPS_UCODE		0x70000004
    341 
    342 /* Section contains some sort of debugging information.  The exact
    343    format is unspecified.  It's probably ECOFF symbols.  */
    344 #define SHT_MIPS_DEBUG		0x70000005
    345 
    346 /* Section contains register usage information.  */
    347 #define SHT_MIPS_REGINFO	0x70000006
    348 
    349 /* ??? */
    350 #define SHT_MIPS_PACKAGE	0x70000007
    351 
    352 /* ??? */
    353 #define SHT_MIPS_PACKSYM	0x70000008
    354 
    355 /* ??? */
    356 #define SHT_MIPS_RELD		0x70000009
    357 
    358 /* Section contains interface information.  */
    359 #define SHT_MIPS_IFACE		0x7000000b
    360 
    361 /* Section contains description of contents of another section.  */
    362 #define SHT_MIPS_CONTENT	0x7000000c
    363 
    364 /* Section contains miscellaneous options.  */
    365 #define SHT_MIPS_OPTIONS	0x7000000d
    366 
    367 /* ??? */
    368 #define SHT_MIPS_SHDR		0x70000010
    369 
    370 /* ??? */
    371 #define SHT_MIPS_FDESC		0x70000011
    372 
    373 /* ??? */
    374 #define SHT_MIPS_EXTSYM		0x70000012
    375 
    376 /* ??? */
    377 #define SHT_MIPS_DENSE		0x70000013
    378 
    379 /* ??? */
    380 #define SHT_MIPS_PDESC		0x70000014
    381 
    382 /* ??? */
    383 #define SHT_MIPS_LOCSYM		0x70000015
    384 
    385 /* ??? */
    386 #define SHT_MIPS_AUXSYM		0x70000016
    387 
    388 /* ??? */
    389 #define SHT_MIPS_OPTSYM		0x70000017
    390 
    391 /* ??? */
    392 #define SHT_MIPS_LOCSTR		0x70000018
    393 
    394 /* ??? */
    395 #define SHT_MIPS_LINE		0x70000019
    396 
    397 /* ??? */
    398 #define SHT_MIPS_RFDESC		0x7000001a
    399 
    400 /* Delta C++: symbol table */
    401 #define SHT_MIPS_DELTASYM	0x7000001b
    402 
    403 /* Delta C++: instance table */
    404 #define SHT_MIPS_DELTAINST	0x7000001c
    405 
    406 /* Delta C++: class table */
    407 #define SHT_MIPS_DELTACLASS	0x7000001d
    408 
    409 /* DWARF debugging section.  */
    410 #define SHT_MIPS_DWARF		0x7000001e
    411 
    412 /* Delta C++: declarations */
    413 #define SHT_MIPS_DELTADECL	0x7000001f
    414 
    415 /* List of libraries the binary depends on.  Includes a time stamp, version
    416    number.  */
    417 #define SHT_MIPS_SYMBOL_LIB	0x70000020
    418 
    419 /* Events section.  */
    420 #define SHT_MIPS_EVENTS		0x70000021
    421 
    422 /* ??? */
    423 #define SHT_MIPS_TRANSLATE	0x70000022
    424 
    425 /* Special pixie sections */
    426 #define SHT_MIPS_PIXIE		0x70000023
    427 
    428 /* Address translation table (for debug info) */
    429 #define SHT_MIPS_XLATE		0x70000024
    430 
    431 /* SGI internal address translation table (for debug info) */
    432 #define SHT_MIPS_XLATE_DEBUG	0x70000025
    433 
    434 /* Intermediate code */
    435 #define SHT_MIPS_WHIRL		0x70000026
    436 
    437 /* C++ exception handling region info */
    438 #define SHT_MIPS_EH_REGION	0x70000027
    439 
    440 /* Obsolete address translation table (for debug info) */
    441 #define SHT_MIPS_XLATE_OLD	0x70000028
    442 
    443 /* Runtime procedure descriptor table exception information (ucode) ??? */
    444 #define SHT_MIPS_PDR_EXCEPTION	0x70000029
    445 
    446 /* ABI related flags section.  */
    447 #define SHT_MIPS_ABIFLAGS	0x7000002a
    448 
    449 /* A section of type SHT_MIPS_LIBLIST contains an array of the
    450    following structure.  The sh_link field is the section index of the
    451    string table.  The sh_info field is the number of entries in the
    452    section.  */
    453 typedef struct
    454 {
    455   /* String table index for name of shared object.  */
    456   unsigned long l_name;
    457   /* Time stamp.  */
    458   unsigned long l_time_stamp;
    459   /* Checksum of symbol names and common sizes.  */
    460   unsigned long l_checksum;
    461   /* String table index for version.  */
    462   unsigned long l_version;
    463   /* Flags.  */
    464   unsigned long l_flags;
    465 } Elf32_Lib;
    466 
    467 /* The external version of Elf32_Lib.  */
    468 typedef struct
    469 {
    470   unsigned char l_name[4];
    471   unsigned char l_time_stamp[4];
    472   unsigned char l_checksum[4];
    473   unsigned char l_version[4];
    474   unsigned char l_flags[4];
    475 } Elf32_External_Lib;
    476 
    477 /* The l_flags field of an Elf32_Lib structure may contain the
    478    following flags.  */
    479 
    480 /* Require an exact match at runtime.  */
    481 #define LL_EXACT_MATCH		0x00000001
    482 
    483 /* Ignore version incompatibilities at runtime.  */
    484 #define LL_IGNORE_INT_VER	0x00000002
    485 
    486 /* Require matching minor version number.  */
    487 #define LL_REQUIRE_MINOR	0x00000004
    488 
    489 /* ??? */
    490 #define LL_EXPORTS		0x00000008
    491 
    492 /* Delay loading of this library until really needed.  */
    493 #define LL_DELAY_LOAD		0x00000010
    494 
    495 /* ??? Delta C++ stuff ??? */
    496 #define LL_DELTA		0x00000020
    497 
    498 
    499 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
    500    .dynsym section.  Each element has the following type.  */
    501 typedef unsigned long Elf32_Conflict;
    502 typedef unsigned char Elf32_External_Conflict[4];
    503 
    504 typedef unsigned long Elf64_Conflict;
    505 typedef unsigned char Elf64_External_Conflict[8];
    506 
    507 /* A section of type SHT_MIPS_GPTAB contains information about how
    508    much GP space would be required for different -G arguments.  This
    509    information is only used so that the linker can provide informative
    510    suggestions as to the best -G value to use.  The sh_info field is
    511    the index of the section for which this information applies.  The
    512    contents of the section are an array of the following union.  The
    513    first element uses the gt_header field.  The remaining elements use
    514    the gt_entry field.  */
    515 typedef union
    516 {
    517   struct
    518     {
    519       /* -G value actually used for this object file.  */
    520       unsigned long gt_current_g_value;
    521       /* Unused.  */
    522       unsigned long gt_unused;
    523     } gt_header;
    524   struct
    525     {
    526       /* If this -G argument has been used...  */
    527       unsigned long gt_g_value;
    528       /* ...this many GP section bytes would be required.  */
    529       unsigned long gt_bytes;
    530     } gt_entry;
    531 } Elf32_gptab;
    532 
    533 /* The external version of Elf32_gptab.  */
    534 
    535 typedef union
    536 {
    537   struct
    538     {
    539       unsigned char gt_current_g_value[4];
    540       unsigned char gt_unused[4];
    541     } gt_header;
    542   struct
    543     {
    544       unsigned char gt_g_value[4];
    545       unsigned char gt_bytes[4];
    546     } gt_entry;
    547 } Elf32_External_gptab;
    548 
    549 /* A section of type SHT_MIPS_REGINFO contains the following
    550    structure.  */
    551 typedef struct
    552 {
    553   /* Mask of general purpose registers used.  */
    554   unsigned long ri_gprmask;
    555   /* Mask of co-processor registers used.  */
    556   unsigned long ri_cprmask[4];
    557   /* GP register value for this object file.  */
    558   long ri_gp_value;
    559 } Elf32_RegInfo;
    560 
    561 /* The external version of the Elf_RegInfo structure.  */
    562 typedef struct
    563 {
    564   unsigned char ri_gprmask[4];
    565   unsigned char ri_cprmask[4][4];
    566   unsigned char ri_gp_value[4];
    567 } Elf32_External_RegInfo;
    568 
    569 /* MIPS ELF .reginfo swapping routines.  */
    570 extern void bfd_mips_elf32_swap_reginfo_in
    571   (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
    572 extern void bfd_mips_elf32_swap_reginfo_out
    573   (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
    574 
    575 /* Processor specific section flags.  */
    577 
    578 /* This section must be in the global data area.  */
    579 #define SHF_MIPS_GPREL		0x10000000
    580 
    581 /* This section should be merged.  */
    582 #define SHF_MIPS_MERGE		0x20000000
    583 
    584 /* This section contains address data of size implied by section
    585    element size.  */
    586 #define SHF_MIPS_ADDR		0x40000000
    587 
    588 /* This section contains string data.  */
    589 #define SHF_MIPS_STRING		0x80000000
    590 
    591 /* This section may not be stripped.  */
    592 #define SHF_MIPS_NOSTRIP	0x08000000
    593 
    594 /* This section is local to threads.  */
    595 #define SHF_MIPS_LOCAL		0x04000000
    596 
    597 /* Linker should generate implicit weak names for this section.  */
    598 #define SHF_MIPS_NAMES		0x02000000
    599 
    600 /* Section contais text/data which may be replicated in other sections.
    601    Linker should retain only one copy.  */
    602 #define SHF_MIPS_NODUPES	0x01000000
    603 
    604 /* Processor specific program header types.  */
    606 
    607 /* Register usage information.  Identifies one .reginfo section.  */
    608 #define PT_MIPS_REGINFO		0x70000000
    609 
    610 /* Runtime procedure table.  */
    611 #define PT_MIPS_RTPROC		0x70000001
    612 
    613 /* .MIPS.options section.  */
    614 #define PT_MIPS_OPTIONS		0x70000002
    615 
    616 /* Records ABI related flags.  */
    617 #define PT_MIPS_ABIFLAGS	0x70000003
    618 
    619 /* Processor specific dynamic array tags.  */
    621 
    622 /* 32 bit version number for runtime linker interface.  */
    623 #define DT_MIPS_RLD_VERSION	0x70000001
    624 
    625 /* Time stamp.  */
    626 #define DT_MIPS_TIME_STAMP	0x70000002
    627 
    628 /* Checksum of external strings and common sizes.  */
    629 #define DT_MIPS_ICHECKSUM	0x70000003
    630 
    631 /* Index of version string in string table.  */
    632 #define DT_MIPS_IVERSION	0x70000004
    633 
    634 /* 32 bits of flags.  */
    635 #define DT_MIPS_FLAGS		0x70000005
    636 
    637 /* Base address of the segment.  */
    638 #define DT_MIPS_BASE_ADDRESS	0x70000006
    639 
    640 /* ??? */
    641 #define DT_MIPS_MSYM		0x70000007
    642 
    643 /* Address of .conflict section.  */
    644 #define DT_MIPS_CONFLICT	0x70000008
    645 
    646 /* Address of .liblist section.  */
    647 #define DT_MIPS_LIBLIST		0x70000009
    648 
    649 /* Number of local global offset table entries.  */
    650 #define DT_MIPS_LOCAL_GOTNO	0x7000000a
    651 
    652 /* Number of entries in the .conflict section.  */
    653 #define DT_MIPS_CONFLICTNO	0x7000000b
    654 
    655 /* Number of entries in the .liblist section.  */
    656 #define DT_MIPS_LIBLISTNO	0x70000010
    657 
    658 /* Number of entries in the .dynsym section.  */
    659 #define DT_MIPS_SYMTABNO	0x70000011
    660 
    661 /* Index of first external dynamic symbol not referenced locally.  */
    662 #define DT_MIPS_UNREFEXTNO	0x70000012
    663 
    664 /* Index of first dynamic symbol in global offset table.  */
    665 #define DT_MIPS_GOTSYM		0x70000013
    666 
    667 /* Number of page table entries in global offset table.  */
    668 #define DT_MIPS_HIPAGENO	0x70000014
    669 
    670 /* Address of run time loader map, used for debugging.  */
    671 #define DT_MIPS_RLD_MAP		0x70000016
    672 
    673 /* Delta C++ class definition.  */
    674 #define DT_MIPS_DELTA_CLASS	0x70000017
    675 
    676 /* Number of entries in DT_MIPS_DELTA_CLASS.  */
    677 #define DT_MIPS_DELTA_CLASS_NO	0x70000018
    678 
    679 /* Delta C++ class instances.  */
    680 #define DT_MIPS_DELTA_INSTANCE	0x70000019
    681 
    682 /* Number of entries in DT_MIPS_DELTA_INSTANCE.  */
    683 #define DT_MIPS_DELTA_INSTANCE_NO	0x7000001a
    684 
    685 /* Delta relocations.  */
    686 #define DT_MIPS_DELTA_RELOC	0x7000001b
    687 
    688 /* Number of entries in DT_MIPS_DELTA_RELOC.  */
    689 #define DT_MIPS_DELTA_RELOC_NO	0x7000001c
    690 
    691 /* Delta symbols that Delta relocations refer to.  */
    692 #define DT_MIPS_DELTA_SYM	0x7000001d
    693 
    694 /* Number of entries in DT_MIPS_DELTA_SYM.  */
    695 #define DT_MIPS_DELTA_SYM_NO	0x7000001e
    696 
    697 /* Delta symbols that hold class declarations.  */
    698 #define DT_MIPS_DELTA_CLASSSYM	0x70000020
    699 
    700 /* Number of entries in DT_MIPS_DELTA_CLASSSYM.  */
    701 #define DT_MIPS_DELTA_CLASSSYM_NO	0x70000021
    702 
    703 /* Flags indicating information about C++ flavor.  */
    704 #define DT_MIPS_CXX_FLAGS	0x70000022
    705 
    706 /* Pixie information (???).  */
    707 #define DT_MIPS_PIXIE_INIT	0x70000023
    708 
    709 /* Address of .MIPS.symlib */
    710 #define DT_MIPS_SYMBOL_LIB	0x70000024
    711 
    712 /* The GOT index of the first PTE for a segment */
    713 #define DT_MIPS_LOCALPAGE_GOTIDX	0x70000025
    714 
    715 /* The GOT index of the first PTE for a local symbol */
    716 #define DT_MIPS_LOCAL_GOTIDX	0x70000026
    717 
    718 /* The GOT index of the first PTE for a hidden symbol */
    719 #define DT_MIPS_HIDDEN_GOTIDX	0x70000027
    720 
    721 /* The GOT index of the first PTE for a protected symbol */
    722 #define DT_MIPS_PROTECTED_GOTIDX	0x70000028
    723 
    724 /* Address of `.MIPS.options'.  */
    725 #define DT_MIPS_OPTIONS		0x70000029
    726 
    727 /* Address of `.interface'.  */
    728 #define DT_MIPS_INTERFACE	0x7000002a
    729 
    730 /* ??? */
    731 #define DT_MIPS_DYNSTR_ALIGN	0x7000002b
    732 
    733 /* Size of the .interface section.  */
    734 #define DT_MIPS_INTERFACE_SIZE	0x7000002c
    735 
    736 /* Size of rld_text_resolve function stored in the GOT.  */
    737 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR	0x7000002d
    738 
    739 /* Default suffix of DSO to be added by rld on dlopen() calls.  */
    740 #define DT_MIPS_PERF_SUFFIX	0x7000002e
    741 
    742 /* Size of compact relocation section (O32).  */
    743 #define DT_MIPS_COMPACT_SIZE	0x7000002f
    744 
    745 /* GP value for auxiliary GOTs.  */
    746 #define DT_MIPS_GP_VALUE	0x70000030
    747 
    748 /* Address of auxiliary .dynamic.  */
    749 #define DT_MIPS_AUX_DYNAMIC	0x70000031
    750 
    751 /* Address of the base of the PLTGOT.  */
    752 #define DT_MIPS_PLTGOT         0x70000032
    753 
    754 /* Points to the base of a writable PLT.  */
    755 #define DT_MIPS_RWPLT          0x70000034
    756 
    757 /* Address of run time loader map, used for debugging.  */
    758 #define DT_MIPS_RLD_MAP2       0x70000035
    759 
    760 /* Flags which may appear in a DT_MIPS_FLAGS entry.  */
    762 
    763 /* No flags.  */
    764 #define RHF_NONE		0x00000000
    765 
    766 /* Uses shortcut pointers.  */
    767 #define RHF_QUICKSTART		0x00000001
    768 
    769 /* Hash size is not a power of two.  */
    770 #define RHF_NOTPOT		0x00000002
    771 
    772 /* Ignore LD_LIBRARY_PATH.  */
    773 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
    774 
    775 /* DSO address may not be relocated. */
    776 #define RHF_NO_MOVE		0x00000008
    777 
    778 /* SGI specific features. */
    779 #define RHF_SGI_ONLY		0x00000010
    780 
    781 /* Guarantee that .init will finish executing before any non-init
    782    code in DSO is called. */
    783 #define RHF_GUARANTEE_INIT	   0x00000020
    784 
    785 /* Contains Delta C++ code. */
    786 #define RHF_DELTA_C_PLUS_PLUS	   0x00000040
    787 
    788 /* Guarantee that .init will start executing before any non-init
    789    code in DSO is called. */
    790 #define RHF_GUARANTEE_START_INIT   0x00000080
    791 
    792 /* Generated by pixie. */
    793 #define RHF_PIXIE		   0x00000100
    794 
    795 /* Delay-load DSO by default. */
    796 #define RHF_DEFAULT_DELAY_LOAD	   0x00000200
    797 
    798 /* Object may be requickstarted */
    799 #define RHF_REQUICKSTART	   0x00000400
    800 
    801 /* Object has been requickstarted */
    802 #define RHF_REQUICKSTARTED	   0x00000800
    803 
    804 /* Generated by cord. */
    805 #define RHF_CORD		   0x00001000
    806 
    807 /* Object contains no unresolved undef symbols. */
    808 #define RHF_NO_UNRES_UNDEF	   0x00002000
    809 
    810 /* Symbol table is in a safe order. */
    811 #define RHF_RLD_ORDER_SAFE	   0x00004000
    812 
    813 /* Special values for the st_other field in the symbol table.  These
    815    are used in an Irix 5 dynamic symbol table.  */
    816 
    817 #define STO_DEFAULT		STV_DEFAULT
    818 #define STO_INTERNAL		STV_INTERNAL
    819 #define STO_HIDDEN		STV_HIDDEN
    820 #define STO_PROTECTED		STV_PROTECTED
    821 
    822 /* Two topmost bits denote the MIPS ISA for .text symbols:
    823    + 00 -- standard MIPS code,
    824    + 10 -- microMIPS code,
    825    + 11 -- MIPS16 code; requires the following two bits to be set too.
    826    Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.  See below
    827    for details.  */
    828 #define STO_MIPS_ISA		(3 << 6)
    829 
    830 /* The mask spanning the rest of MIPS psABI flags.  At most one is expected
    831    to be set except for STO_MIPS16.  */
    832 #define STO_MIPS_FLAGS		(~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
    833 
    834 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
    835    relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
    836    PLT entries and traditional MIPS lazy binding stubs.  We mark the former
    837    with STO_MIPS_PLT to distinguish them from the latter.  */
    838 #define STO_MIPS_PLT		0x8
    839 #define ELF_ST_IS_MIPS_PLT(other)					\
    840   ((ELF_ST_IS_MIPS16 (other)						\
    841     ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS))			\
    842     : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
    843 #define ELF_ST_SET_MIPS_PLT(other)					\
    844   ((ELF_ST_IS_MIPS16 (other)						\
    845     ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS))			\
    846     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
    847 
    848 /* This value is used to mark PIC functions in an object that mixes
    849    PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
    850    although MIPS16 symbols are never considered to be MIPS_PIC.  */
    851 #define STO_MIPS_PIC		0x20
    852 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
    853 #define ELF_ST_SET_MIPS_PIC(other)					\
    854   ((ELF_ST_IS_MIPS16 (other)						\
    855     ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS))			\
    856     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
    857 
    858 /* This value is used for a mips16 .text symbol.  */
    859 #define STO_MIPS16		0xf0
    860 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
    861 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
    862 
    863 /* This value is used for a microMIPS .text symbol.  To distinguish from
    864    STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
    865    mask is STO_MIPS_ISA.  */
    866 #define STO_MICROMIPS		(2 << 6)
    867 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
    868 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
    869 
    870 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
    871    has been indicated for a .text symbol.  */
    872 #define ELF_ST_IS_COMPRESSED(other) \
    873   (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
    874 
    875 /* This bit is used on Irix to indicate a symbol whose definition
    876    is optional - if, at final link time, it cannot be found, no
    877    error message should be produced.  */
    878 #define STO_OPTIONAL		(1 << 2)
    879 /* A macro to examine the STO_OPTIONAL bit.  */
    880 #define ELF_MIPS_IS_OPTIONAL(other)	((other) & STO_OPTIONAL)
    881 
    882 /* The 64-bit MIPS ELF ABI uses an unusual reloc format.  Each
    884    relocation entry specifies up to three actual relocations, all at
    885    the same address.  The first relocation which required a symbol
    886    uses the symbol in the r_sym field.  The second relocation which
    887    requires a symbol uses the symbol in the r_ssym field.  If all
    888    three relocations require a symbol, the third one uses a zero
    889    value.  */
    890 
    891 /* An entry in a 64 bit SHT_REL section.  */
    892 
    893 typedef struct
    894 {
    895   /* Address of relocation.  */
    896   unsigned char r_offset[8];
    897   /* Symbol index.  */
    898   unsigned char r_sym[4];
    899   /* Special symbol.  */
    900   unsigned char r_ssym[1];
    901   /* Third relocation.  */
    902   unsigned char r_type3[1];
    903   /* Second relocation.  */
    904   unsigned char r_type2[1];
    905   /* First relocation.  */
    906   unsigned char r_type[1];
    907 } Elf64_Mips_External_Rel;
    908 
    909 typedef struct
    910 {
    911   /* Address of relocation.  */
    912   bfd_vma r_offset;
    913   /* Symbol index.  */
    914   unsigned long r_sym;
    915   /* Special symbol.  */
    916   unsigned char r_ssym;
    917   /* Third relocation.  */
    918   unsigned char r_type3;
    919   /* Second relocation.  */
    920   unsigned char r_type2;
    921   /* First relocation.  */
    922   unsigned char r_type;
    923 } Elf64_Mips_Internal_Rel;
    924 
    925 /* An entry in a 64 bit SHT_RELA section.  */
    926 
    927 typedef struct
    928 {
    929   /* Address of relocation.  */
    930   unsigned char r_offset[8];
    931   /* Symbol index.  */
    932   unsigned char r_sym[4];
    933   /* Special symbol.  */
    934   unsigned char r_ssym[1];
    935   /* Third relocation.  */
    936   unsigned char r_type3[1];
    937   /* Second relocation.  */
    938   unsigned char r_type2[1];
    939   /* First relocation.  */
    940   unsigned char r_type[1];
    941   /* Addend.  */
    942   unsigned char r_addend[8];
    943 } Elf64_Mips_External_Rela;
    944 
    945 typedef struct
    946 {
    947   /* Address of relocation.  */
    948   bfd_vma r_offset;
    949   /* Symbol index.  */
    950   unsigned long r_sym;
    951   /* Special symbol.  */
    952   unsigned char r_ssym;
    953   /* Third relocation.  */
    954   unsigned char r_type3;
    955   /* Second relocation.  */
    956   unsigned char r_type2;
    957   /* First relocation.  */
    958   unsigned char r_type;
    959   /* Addend.  */
    960   bfd_signed_vma r_addend;
    961 } Elf64_Mips_Internal_Rela;
    962 
    963 /* MIPS ELF 64 relocation info access macros.  */
    964 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
    965 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
    966 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
    967 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
    968 
    969 /* Values found in the r_ssym field of a relocation entry.  */
    970 
    971 /* No relocation.  */
    972 #define RSS_UNDEF	0
    973 
    974 /* Value of GP.  */
    975 #define RSS_GP		1
    976 
    977 /* Value of GP in object being relocated.  */
    978 #define RSS_GP0		2
    979 
    980 /* Address of location being relocated.  */
    981 #define RSS_LOC		3
    982 
    983 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
    985    which starts with this header.  */
    986 
    987 typedef struct
    988 {
    989   /* Type of option.  */
    990   unsigned char kind[1];
    991   /* Size of option descriptor, including header.  */
    992   unsigned char size[1];
    993   /* Section index of affected section, or 0 for global option.  */
    994   unsigned char section[2];
    995   /* Information specific to this kind of option.  */
    996   unsigned char info[4];
    997 } Elf_External_Options;
    998 
    999 typedef struct
   1000 {
   1001   /* Type of option.  */
   1002   unsigned char kind;
   1003   /* Size of option descriptor, including header.  */
   1004   unsigned char size;
   1005   /* Section index of affected section, or 0 for global option.  */
   1006   unsigned short section;
   1007   /* Information specific to this kind of option.  */
   1008   unsigned long info;
   1009 } Elf_Internal_Options;
   1010 
   1011 /* MIPS ELF option header swapping routines.  */
   1012 extern void bfd_mips_elf_swap_options_in
   1013   (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
   1014 extern void bfd_mips_elf_swap_options_out
   1015   (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
   1016 
   1017 /* Values which may appear in the kind field of an Elf_Options
   1018    structure.  */
   1019 
   1020 /* Undefined.  */
   1021 #define ODK_NULL	0
   1022 
   1023 /* Register usage and GP value.  */
   1024 #define ODK_REGINFO	1
   1025 
   1026 /* Exception processing information.  */
   1027 #define ODK_EXCEPTIONS	2
   1028 
   1029 /* Section padding information.  */
   1030 #define ODK_PAD		3
   1031 
   1032 /* Hardware workarounds performed.  */
   1033 #define ODK_HWPATCH	4
   1034 
   1035 /* Fill value used by the linker.  */
   1036 #define ODK_FILL	5
   1037 
   1038 /* Reserved space for desktop tools.  */
   1039 #define ODK_TAGS	6
   1040 
   1041 /* Hardware workarounds, AND bits when merging.  */
   1042 #define ODK_HWAND	7
   1043 
   1044 /* Hardware workarounds, OR bits when merging.  */
   1045 #define ODK_HWOR	8
   1046 
   1047 /* GP group to use for text/data sections.  */
   1048 #define ODK_GP_GROUP	9
   1049 
   1050 /* ID information.  */
   1051 #define ODK_IDENT	10
   1052 
   1053 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
   1054    structure.  In the 64 bit ABI, it is the following structure.  The
   1055    info field of the options header is not used.  */
   1056 
   1057 typedef struct
   1058 {
   1059   /* Mask of general purpose registers used.  */
   1060   unsigned char ri_gprmask[4];
   1061   /* Padding.  */
   1062   unsigned char ri_pad[4];
   1063   /* Mask of co-processor registers used.  */
   1064   unsigned char ri_cprmask[4][4];
   1065   /* GP register value for this object file.  */
   1066   unsigned char ri_gp_value[8];
   1067 } Elf64_External_RegInfo;
   1068 
   1069 typedef struct
   1070 {
   1071   /* Mask of general purpose registers used.  */
   1072   unsigned long ri_gprmask;
   1073   /* Padding.  */
   1074   unsigned long ri_pad;
   1075   /* Mask of co-processor registers used.  */
   1076   unsigned long ri_cprmask[4];
   1077   /* GP register value for this object file.  */
   1078   bfd_vma ri_gp_value;
   1079 } Elf64_Internal_RegInfo;
   1080 
   1081 /* ABI Flags structure version 0.  */
   1082 
   1083 typedef struct
   1084 {
   1085   /* Version of flags structure.  */
   1086   unsigned char version[2];
   1087   /* The level of the ISA: 1-5, 32, 64.  */
   1088   unsigned char isa_level[1];
   1089   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
   1090   unsigned char isa_rev[1];
   1091   /* The size of general purpose registers.  */
   1092   unsigned char gpr_size[1];
   1093   /* The size of co-processor 1 registers.  */
   1094   unsigned char cpr1_size[1];
   1095   /* The size of co-processor 2 registers.  */
   1096   unsigned char cpr2_size[1];
   1097   /* The floating-point ABI.  */
   1098   unsigned char fp_abi[1];
   1099   /* Processor-specific extension.  */
   1100   unsigned char isa_ext[4];
   1101   /* Mask of ASEs used.  */
   1102   unsigned char ases[4];
   1103   /* Mask of general flags.  */
   1104   unsigned char flags1[4];
   1105   unsigned char flags2[4];
   1106 } Elf_External_ABIFlags_v0;
   1107 
   1108 typedef struct
   1109 {
   1110   /* Version of flags structure.  */
   1111   unsigned short version;
   1112   /* The level of the ISA: 1-5, 32, 64.  */
   1113   unsigned char isa_level;
   1114   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
   1115   unsigned char isa_rev;
   1116   /* The size of general purpose registers.  */
   1117   unsigned char gpr_size;
   1118   /* The size of co-processor 1 registers.  */
   1119   unsigned char cpr1_size;
   1120   /* The size of co-processor 2 registers.  */
   1121   unsigned char cpr2_size;
   1122   /* The floating-point ABI.  */
   1123   unsigned char fp_abi;
   1124   /* Processor-specific extension.  */
   1125   unsigned long isa_ext;
   1126   /* Mask of ASEs used.  */
   1127   unsigned long ases;
   1128   /* Mask of general flags.  */
   1129   unsigned long flags1;
   1130   unsigned long flags2;
   1131 } Elf_Internal_ABIFlags_v0;
   1132 
   1133 typedef struct
   1134 {
   1135   /* The hash value computed from the name of the corresponding
   1136      dynamic symbol.  */
   1137   unsigned char ms_hash_value[4];
   1138   /* Contains both the dynamic relocation index and the symbol flags
   1139      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
   1140      to access the individual values.  The dynamic relocation index
   1141      identifies the first entry in the .rel.dyn section that
   1142      references the dynamic symbol corresponding to this msym entry.
   1143      If the index is 0, no dynamic relocations are associated with the
   1144      symbol.  The symbol flags field is reserved for future use.  */
   1145   unsigned char ms_info[4];
   1146 } Elf32_External_Msym;
   1147 
   1148 typedef struct
   1149 {
   1150   /* The hash value computed from the name of the corresponding
   1151      dynamic symbol.  */
   1152   unsigned long ms_hash_value;
   1153   /* Contains both the dynamic relocation index and the symbol flags
   1154      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
   1155      to access the individual values.  The dynamic relocation index
   1156      identifies the first entry in the .rel.dyn section that
   1157      references the dynamic symbol corresponding to this msym entry.
   1158      If the index is 0, no dynamic relocations are associated with the
   1159      symbol.  The symbol flags field is reserved for future use.  */
   1160   unsigned long ms_info;
   1161 } Elf32_Internal_Msym;
   1162 
   1163 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
   1164 #define ELF32_MS_FLAGS(i)     (i) & 0xff)
   1165 #define ELF32_MS_INFO(r, f)   (((r) << 8) + ((f) & 0xff))
   1166 
   1167 /* MIPS ELF reginfo swapping routines.  */
   1168 extern void bfd_mips_elf64_swap_reginfo_in
   1169   (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
   1170 extern void bfd_mips_elf64_swap_reginfo_out
   1171   (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
   1172 
   1173 /* MIPS ELF flags swapping routines.  */
   1174 extern void bfd_mips_elf_swap_abiflags_v0_in
   1175   (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
   1176 extern void bfd_mips_elf_swap_abiflags_v0_out
   1177   (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
   1178 
   1179 /* Masks for the info work of an ODK_EXCEPTIONS descriptor.  */
   1180 #define OEX_FPU_MIN	0x1f	/* FPEs which must be enabled.  */
   1181 #define OEX_FPU_MAX	0x1f00	/* FPEs which may be enabled.  */
   1182 #define OEX_PAGE0	0x10000	/* Page zero must be mapped.  */
   1183 #define OEX_SMM		0x20000	/* Force sequential memory mode.  */
   1184 #define OEX_FPDBUG	0x40000	/* Force precise floating-point
   1185 				   exceptions (debug mode).  */
   1186 #define OEX_DISMISS	0x80000	/* Dismiss invalid address faults.  */
   1187 
   1188 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX.  */
   1189 #define OEX_FPU_INVAL	0x10	/* Invalid operation exception.  */
   1190 #define OEX_FPU_DIV0	0x08	/* Division by zero exception.  */
   1191 #define OEX_FPU_OFLO	0x04	/* Overflow exception.  */
   1192 #define OEX_FPU_UFLO	0x02	/* Underflow exception.  */
   1193 #define OEX_FPU_INEX	0x01	/* Inexact exception.  */
   1194 
   1195 /* Masks for the info word of an ODK_PAD descriptor.  */
   1196 #define OPAD_PREFIX	0x01
   1197 #define OPAD_POSTFIX	0x02
   1198 #define OPAD_SYMBOL	0x04
   1199 
   1200 /* Masks for the info word of an ODK_HWPATCH descriptor.  */
   1201 #define OHW_R4KEOP	0x00000001	/* R4000 end-of-page patch.  */
   1202 #define OHW_R8KPFETCH	0x00000002	/* May need R8000 prefetch patch.  */
   1203 #define OHW_R5KEOP	0x00000004	/* R5000 end-of-page patch.  */
   1204 #define OHW_R5KCVTL	0x00000008	/* R5000 cvt.[ds].l bug
   1205 					   (clean == 1).  */
   1206 #define OHW_R10KLDL	0x00000010	/* Needs R10K misaligned
   1207 					   load patch. */
   1208 
   1209 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor.  */
   1210 #define OGP_GROUP	0x0000ffff	/* GP group number.  */
   1211 #define OGP_SELF	0xffff0000	/* Self-contained GP groups.  */
   1212 
   1213 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor.  */
   1214 #define OHWA0_R4KEOP_CHECKED	0x00000001
   1215 #define OHWA0_R4KEOP_CLEAN	0x00000002
   1216 
   1217 /* Values for the xxx_size bytes of an ABI flags structure.  */
   1218 
   1219 #define AFL_REG_NONE	     0x00	/* No registers.  */
   1220 #define AFL_REG_32	     0x01	/* 32-bit registers.  */
   1221 #define AFL_REG_64	     0x02	/* 64-bit registers.  */
   1222 #define AFL_REG_128	     0x03	/* 128-bit registers.  */
   1223 
   1224 /* Masks for the ases word of an ABI flags structure.  */
   1225 
   1226 #define AFL_ASE_DSP          0x00000001 /* DSP ASE.  */
   1227 #define AFL_ASE_DSPR2        0x00000002 /* DSP R2 ASE.  */
   1228 #define AFL_ASE_EVA          0x00000004 /* Enhanced VA Scheme.  */
   1229 #define AFL_ASE_MCU          0x00000008 /* MCU (MicroController) ASE.  */
   1230 #define AFL_ASE_MDMX         0x00000010 /* MDMX ASE.  */
   1231 #define AFL_ASE_MIPS3D       0x00000020 /* MIPS-3D ASE.  */
   1232 #define AFL_ASE_MT           0x00000040 /* MT ASE.  */
   1233 #define AFL_ASE_SMARTMIPS    0x00000080 /* SmartMIPS ASE.  */
   1234 #define AFL_ASE_VIRT         0x00000100 /* VZ ASE.  */
   1235 #define AFL_ASE_MSA          0x00000200 /* MSA ASE.  */
   1236 #define AFL_ASE_MIPS16       0x00000400 /* MIPS16 ASE.  */
   1237 #define AFL_ASE_MICROMIPS    0x00000800 /* MICROMIPS ASE.  */
   1238 #define AFL_ASE_XPA          0x00001000 /* XPA ASE.  */
   1239 #define AFL_ASE_DSPR6        0x00002000 /* DSP R6 ASE.  */
   1240 #define AFL_ASE_MASK         0x00003fff /* All ASEs.  */
   1241 
   1242 /* Values for the isa_ext word of an ABI flags structure.  */
   1243 
   1244 #define AFL_EXT_XLR           1  /* RMI Xlr instruction.  */
   1245 #define AFL_EXT_OCTEON2       2  /* Cavium Networks Octeon2.  */
   1246 #define AFL_EXT_OCTEONP       3  /* Cavium Networks OcteonP.  */
   1247 #define AFL_EXT_LOONGSON_3A   4  /* Loongson 3A.  */
   1248 #define AFL_EXT_OCTEON        5  /* Cavium Networks Octeon.  */
   1249 #define AFL_EXT_5900          6  /* MIPS R5900 instruction.  */
   1250 #define AFL_EXT_4650          7  /* MIPS R4650 instruction.  */
   1251 #define AFL_EXT_4010          8  /* LSI R4010 instruction.  */
   1252 #define AFL_EXT_4100          9  /* NEC VR4100 instruction.  */
   1253 #define AFL_EXT_3900         10  /* Toshiba R3900 instruction.  */
   1254 #define AFL_EXT_10000        11  /* MIPS R10000 instruction.  */
   1255 #define AFL_EXT_SB1          12  /* Broadcom SB-1 instruction.  */
   1256 #define AFL_EXT_4111         13  /* NEC VR4111/VR4181 instruction.  */
   1257 #define AFL_EXT_4120         14  /* NEC VR4120 instruction.  */
   1258 #define AFL_EXT_5400         15  /* NEC VR5400 instruction.  */
   1259 #define AFL_EXT_5500         16  /* NEC VR5500 instruction.  */
   1260 #define AFL_EXT_LOONGSON_2E  17  /* ST Microelectronics Loongson 2E.  */
   1261 #define AFL_EXT_LOONGSON_2F  18  /* ST Microelectronics Loongson 2F.  */
   1262 #define AFL_EXT_OCTEON3      19  /* Cavium Networks Octeon3.  */
   1263 
   1264 /* Masks for the flags1 word of an ABI flags structure.  */
   1265 #define AFL_FLAGS1_ODDSPREG   1	 /* Uses odd single-precision registers.  */
   1266 
   1267 extern unsigned int bfd_mips_isa_ext (bfd *);
   1268 
   1269 
   1271 /* Object attribute tags.  */
   1272 enum
   1273 {
   1274   /* 0-3 are generic.  */
   1275 
   1276   /* Floating-point ABI used by this object file.  */
   1277   Tag_GNU_MIPS_ABI_FP = 4,
   1278 
   1279   /* MSA ABI used by this object file.  */
   1280   Tag_GNU_MIPS_ABI_MSA = 8,
   1281 };
   1282 
   1283 /* Object attribute values.  */
   1284 enum
   1285 {
   1286   /* Values defined for Tag_GNU_MIPS_ABI_FP.  */
   1287 
   1288   /* Not tagged or not using any ABIs affected by the differences.  */
   1289   Val_GNU_MIPS_ABI_FP_ANY = 0,
   1290 
   1291   /* Using hard-float -mdouble-float.  */
   1292   Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
   1293 
   1294   /* Using hard-float -msingle-float.  */
   1295   Val_GNU_MIPS_ABI_FP_SINGLE = 2,
   1296 
   1297   /* Using soft-float.  */
   1298   Val_GNU_MIPS_ABI_FP_SOFT = 3,
   1299 
   1300   /* Using -mips32r2 -mfp64.  */
   1301   Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
   1302 
   1303   /* Using -mfpxx */
   1304   Val_GNU_MIPS_ABI_FP_XX = 5,
   1305 
   1306   /* Using -mips32r2 -mfp64.  */
   1307   Val_GNU_MIPS_ABI_FP_64 = 6,
   1308 
   1309   /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
   1310   Val_GNU_MIPS_ABI_FP_64A = 7,
   1311 
   1312   /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
   1313 
   1314   /* Not tagged or not using any ABIs affected by the differences.  */
   1315   Val_GNU_MIPS_ABI_MSA_ANY = 0,
   1316 
   1317   /* Using 128-bit MSA.  */
   1318   Val_GNU_MIPS_ABI_MSA_128 = 1,
   1319 };
   1320 
   1321 #endif /* _ELF_MIPS_H */
   1322