| /external/compiler-rt/lib/builtins/arm/ |
| udivmodsi4.S | 119 #define IMM #
122 cmp r0, r1, lsl IMM shift; \
124 WIDE(addhs) r3, r3, IMM (1 << shift); \
125 WIDE(subhs) r0, r0, r1, lsl IMM shift
|
| udivsi3.S | 116 #define IMM #
119 cmp r0, r1, lsl IMM shift; \
121 WIDE(addhs) r3, r3, IMM (1 << shift); \
122 WIDE(subhs) r0, r0, r1, lsl IMM shift
|
| umodsi3.S | 110 #define IMM #
113 cmp r0, r1, lsl IMM shift; \
115 WIDE(subhs) r0, r0, r1, lsl IMM shift
|
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| nouveau_render.h | 55 IMM
61 /* Maps a HW VBO index or IMM emission order to an index in
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| rx-decode.c | 148 #define IMM(sf) immediate (sf, 0, ld)
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs.h | 62 IMM,
94 /** Register file: ARF, GRF, MRF, IMM. */
115 /** Value for file == IMM */
120 } imm; member in class:fs_reg
|
| brw_vec4.h | 51 IMM = BRW_IMMEDIATE_VALUE,
61 /** Register file: ARF, GRF, MRF, IMM. */
76 } imm; member in class:brw::reg
|
| /external/pcre/dist/sljit/ |
| sljitNativeMIPS_common.c | 89 #define IMM(imm) ((imm) & 0xffff)
90 #define SH_IMM(imm) ((imm) << 6)
562 FAIL_IF(push_inst(compiler, ADDIU_W | S(SLJIT_SP) | T(SLJIT_SP) | IMM(-local_size), DR(SLJIT_SP)));
574 FAIL_IF(push_inst(compiler, STACK_STORE | base | TA(RETURN_ADDR_REG) | IMM(offs), MOVABLE_INS));
579 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS));
584 FAIL_IF(push_inst(compiler, STACK_STORE | base | T(i) | IMM(offs), MOVABLE_INS));
634 FAIL_IF(push_inst(compiler, STACK_LOAD | base | TA(RETURN_ADDR_REG) | IMM(local_size - (sljit_si)sizeof(sljit_sw)), RETURN_ADDR_REG))
[all...] |
| sljitNativePPC_common.c | 121 #define IMM(imm) ((imm) & 0xffff)
586 FAIL_IF(push_inst(compiler, STACK_STORE | S(TMP_ZERO) | A(SLJIT_SP) | IMM(offs)));
591 FAIL_IF(push_inst(compiler, STACK_STORE | S(i) | A(SLJIT_SP) | IMM(offs)));
596 FAIL_IF(push_inst(compiler, STACK_STORE | S(i) | A(SLJIT_SP) | IMM(offs)));
602 FAIL_IF(push_inst(compiler, STACK_STORE | S(0) | A(SLJIT_SP) | IMM(2 * sizeof(sljit_sw))));
604 FAIL_IF(push_inst(compiler, STACK_STORE | S(0) | A(SLJIT_SP) | IMM(sizeof(sljit_sw))));
621 FAIL_IF(push_inst(compiler, STWU | S(SLJIT_SP) | A(SLJIT_SP) | IMM(-local_size)));
628 FAIL_IF(push_inst(compiler, STDU | S(SLJIT_SP) | A(SLJIT_SP) | IMM(-local_size)))
[all...] |
| sljitNativeSPARC_common.c | 110 #define IMM(imm) (((imm) & 0x1fff) | IMM_ARG)
433 FAIL_IF(push_inst(compiler, SAVE | D(SLJIT_SP) | S1(SLJIT_SP) | IMM(-local_size), UNMOVABLE_INS));
467 FAIL_IF(push_inst(compiler, JMPL | D(0) | S1A(31) | IMM(8), UNMOVABLE_INS));
521 | S1(arg & REG_MASK) | ((arg & OFFS_REG_MASK) ? S2(OFFS_REG(arg)) : IMM(argw)),
588 FAIL_IF(push_inst(compiler, ADD | D(TMP_REG3) | S1(TMP_REG3) | IMM(argw - compiler->cache_argw), DR(TMP_REG3)));
609 return push_inst(compiler, data_transfer_insts[flags & MEM_MASK] | dest | S1(arg2) | IMM(0), delay_slot);
638 arg2 goes to TMP_REG2, imm or src reg
789 FAIL_IF(push_inst(compiler, SRA | D(TMP_REG1) | S1(SLJIT_R0) | IMM(31), DR(TMP_REG1)))
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| h8300.h | 50 IMM = 0x0400,
121 IMM3 = IMM | L_3,
122 IMM4 = IMM | L_4,
123 IMM5 = IMM | L_5,
124 IMM3NZ = IMM | L_3NZ,
125 IMM2 = IMM | L_2,
127 IMM8 = IMM | SRC | L_8,
128 IMM8U = IMM | SRC | L_8U,
129 IMM16 = IMM | SRC | L_16,
130 IMM16U = IMM | SRC | L_16U
[all...] |
| /external/valgrind/VEX/priv/ |
| guest_ppc_toIR.c | [all...] |
