/prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/link/internal/arm/ |
l.go | 72 RegSize = 4
|
/prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/link/internal/arm64/ |
l.go | 71 RegSize = 8
|
/prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/link/internal/ppc64/ |
l.go | 71 RegSize = 8
|
/prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/link/internal/x86/ |
l.go | 40 RegSize = 4
|
/prebuilts/go/darwin-x86/src/cmd/link/internal/arm/ |
l.go | 69 RegSize = 4
|
/prebuilts/go/darwin-x86/src/cmd/link/internal/arm64/ |
l.go | 68 RegSize = 8
|
/prebuilts/go/darwin-x86/src/cmd/link/internal/ppc64/ |
l.go | 68 RegSize = 8
|
/prebuilts/go/darwin-x86/src/cmd/link/internal/x86/ |
l.go | 37 RegSize = 4
|
/prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/link/internal/arm/ |
l.go | 72 RegSize = 4
|
/prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/link/internal/arm64/ |
l.go | 71 RegSize = 8
|
/prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/link/internal/ppc64/ |
l.go | 71 RegSize = 8
|
/prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/link/internal/x86/ |
l.go | 40 RegSize = 4
|
/prebuilts/go/linux-x86/src/cmd/link/internal/arm/ |
l.go | 69 RegSize = 4
|
/prebuilts/go/linux-x86/src/cmd/link/internal/arm64/ |
l.go | 68 RegSize = 8
|
/prebuilts/go/linux-x86/src/cmd/link/internal/ppc64/ |
l.go | 68 RegSize = 8
|
/prebuilts/go/linux-x86/src/cmd/link/internal/x86/ |
l.go | 37 RegSize = 4
|
/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfExpression.cpp | 131 unsigned RegSize = TRI.getMinimalPhysRegClass(MachineReg)->getSize() * 8; 134 SmallBitVector Coverage(RegSize, false); 143 SmallBitVector Intersection(RegSize, false);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.cpp | 663 unsigned RegSize = RegisterVT.getSizeInBits(); 667 if (NumZeroBits == RegSize) { 679 if (NumSignBits == RegSize) 681 else if (NumZeroBits >= RegSize-1) 683 else if (NumSignBits > RegSize-8) 685 else if (NumZeroBits >= RegSize-8) 687 else if (NumSignBits > RegSize-16) 689 else if (NumZeroBits >= RegSize-16) 691 else if (NumSignBits > RegSize-32) 693 else if (NumZeroBits >= RegSize-32 [all...] |
/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 41 const uint16_t RegSize, Alignment; // Size & Alignment of register in bytes 82 unsigned getSize() const { return RegSize; }
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/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.cpp | 632 LogicOp() : RegSize(0), ImmLSB(0), ImmSize(0) {} 633 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize) 634 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {} 636 explicit operator bool() const { return RegSize; } 638 unsigned RegSize, ImmLSB, ImmSize; 728 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB); 730 if (isRxSBGMask(Imm, And.RegSize, Start, End)) { 732 if (And.RegSize == 64) { [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFrameLowering.cpp | 149 int RegSize; 152 RegSize = 8; 156 RegSize = 4; 169 count += RegSize; [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FastISel.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |