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    Searched defs:TM (Results 1 - 25 of 97) sorted by null

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  /external/llvm/include/llvm/Passes/
PassBuilder.h 33 TargetMachine *TM;
36 explicit PassBuilder(TargetMachine *TM = nullptr) : TM(TM) {}
  /external/mesa3d/src/gallium/drivers/radeon/
R600RegisterInfo.h 27 AMDGPUTargetMachine &TM;
30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
SIRegisterInfo.h 27 AMDGPUTargetMachine &TM;
30 SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
AMDGPUConvertToISA.cpp 27 TargetMachine &TM;
30 AMDGPUConvertToISAPass(TargetMachine &tm) :
31 MachineFunctionPass(ID), TM(tm) { }
43 FunctionPass *llvm::createAMDGPUConvertToISAPass(TargetMachine &tm) {
44 return new AMDGPUConvertToISAPass(tm);
50 static_cast<const AMDGPUInstrInfo*>(TM.getInstrInfo());
SIInstrInfo.h 26 AMDGPUTargetMachine &TM;
29 explicit SIInstrInfo(AMDGPUTargetMachine &tm);
AMDGPUInstrInfo.h 43 TargetMachine &TM;
47 explicit AMDGPUInstrInfo(TargetMachine &tm);
AMDGPURegisterInfo.h 32 TargetMachine &TM;
36 AMDGPURegisterInfo(TargetMachine &tm, const TargetInstrInfo &tii);
R600InstrInfo.h 35 AMDGPUTargetMachine &TM;
40 explicit R600InstrInfo(AMDGPUTargetMachine &tm);
63 DFAPacketizer *CreateTargetScheduleState(const TargetMachine *TM,
SIAssignInterpRegs.cpp 36 TargetMachine &TM;
42 SIAssignInterpRegsPass(TargetMachine &tm) :
43 MachineFunctionPass(ID), TM(tm) { }
63 FunctionPass *llvm::createSIAssignInterpRegsPass(TargetMachine &tm) {
64 return new SIAssignInterpRegsPass(tm);
126 const TargetInstrInfo * TII = TM.getInstrInfo();
  /external/llvm/lib/Target/Mips/
MipsModuleISelDAGToDAG.cpp 26 : MachineFunctionPass(ID), TM(TM_) {}
36 MipsTargetMachine &TM;
44 TM.resetSubtarget(&MF);
48 llvm::FunctionPass *llvm::createMipsModuleISelDagPass(MipsTargetMachine &TM) {
49 return new MipsModuleDAGToDAGISel(TM);
MipsTargetObjectFile.h 20 const MipsTargetMachine *TM;
23 void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
27 bool IsGlobalInSmallSection(const GlobalValue *GV, const TargetMachine &TM,
30 const TargetMachine &TM) const;
32 const TargetMachine &TM) const;
36 const TargetMachine &TM) const override;
40 const TargetMachine &TM) const;
  /external/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.h 29 const NVPTXTargetMachine &TM;
40 explicit NVPTXDAGToDAGISel(NVPTXTargetMachine &tm,
NVPTXLowerKernelArgs.cpp 114 NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr)
115 : FunctionPass(ID), TM(TM) {}
121 const NVPTXTargetMachine *TM;
200 if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
224 else if (TM && TM->getDrvInterface() == NVPTX::CUDA)
232 llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) {
233 return new NVPTXLowerKernelArgs(TM);
    [all...]
  /external/llvm/lib/Target/XCore/
XCoreISelLowering.h 96 explicit XCoreTargetLowering(const TargetMachine &TM,
143 const TargetMachine &TM;
  /external/llvm/include/llvm/CodeGen/
MachineFunctionAnalysis.h 29 const TargetMachine &TM;
36 explicit MachineFunctionAnalysis(const TargetMachine &tm,
StackProtector.h 51 const TargetMachine *TM;
109 : FunctionPass(ID), TM(nullptr), TLI(nullptr), SSPBufferSize(0) {
112 StackProtector(const TargetMachine *TM)
113 : FunctionPass(ID), TM(TM), TLI(nullptr), Trip(TM->getTargetTriple()),
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.h 59 const PPCTargetMachine &TM;
62 PPCRegisterInfo(const PPCTargetMachine &TM);
PPCMCInstLower.cpp 39 const TargetMachine &TM = AP.TM;
43 bool isDarwin = TM.getTargetTriple().isOSDarwin();
63 TM.getNameWithPrefix(Name, GV, *Mang);
  /external/llvm/include/llvm/ExecutionEngine/Orc/
CompileUtils.h 31 SimpleCompiler(TargetMachine &TM) : TM(TM) {}
40 if (TM.addPassesToEmitMC(PM, Ctx, ObjStream))
55 TargetMachine &TM;
  /external/llvm/lib/Target/AMDGPU/
AMDGPUTargetTransformInfo.cpp 171 const TargetMachine &TM = getTLI()->getTargetMachine();
172 return isIntrinsicSourceOfDivergence(TM.getIntrinsicInfo(), Intrinsic);
  /external/llvm/lib/Target/X86/
X86AsmPrinter.h 43 StackMapShadowTracker(TargetMachine &TM);
59 TargetMachine &TM;
89 explicit X86AsmPrinter(TargetMachine &TM,
91 : AsmPrinter(TM, std::move(Streamer)), SM(*this), FM(*this),
92 SMShadowTracker(TM) {}
  /external/strace/tests/
ksysent.c 37 #define TM 0
  /external/llvm/examples/Kaleidoscope/include/
KaleidoscopeJIT.h 36 : TM(EngineBuilder().selectTarget()), DL(TM->createDataLayout()),
37 CompileLayer(ObjectLayer, SimpleCompiler(*TM)) {
41 TargetMachine &getTargetMachine() { return *TM; }
104 std::unique_ptr<TargetMachine> TM;
  /external/llvm/lib/CodeGen/
InterleavedAccessPass.cpp 69 InterleavedAccess(const TargetMachine *TM = nullptr)
70 : FunctionPass(ID), TM(TM), TLI(nullptr) {
79 const TargetMachine *TM;
97 FunctionPass *llvm::createInterleavedAccessPass(const TargetMachine *TM) {
98 return new InterleavedAccess(TM);
262 if (!TM || !LowerInterleavedAccesses)
267 TLI = TM->getSubtargetImpl(F)->getTargetLowering();
LowerEmuTLS.cpp 31 const TargetMachine *TM;
34 explicit LowerEmuTLS() : ModulePass(ID), TM(nullptr) { }
35 explicit LowerEmuTLS(const TargetMachine *TM)
36 : ModulePass(ID), TM(TM) {
61 ModulePass *llvm::createLowerEmuTLSPass(const TargetMachine *TM) {
62 return new LowerEmuTLS(TM);
66 if (!TM || !TM->Options.EmulatedTLS)

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