1 /* itbl-ops.c 2 Copyright (C) 1997-2014 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 19 02110-1301, USA. */ 20 21 /*======================================================================*/ 22 /* 23 * Herein lies the support for dynamic specification of processor 24 * instructions and registers. Mnemonics, values, and formats for each 25 * instruction and register are specified in an ascii file consisting of 26 * table entries. The grammar for the table is defined in the document 27 * "Processor instruction table specification". 28 * 29 * Instructions use the gnu assembler syntax, with the addition of 30 * allowing mnemonics for register. 31 * Eg. "func $2,reg3,0x100,symbol ; comment" 32 * func - opcode name 33 * $n - register n 34 * reg3 - mnemonic for processor's register defined in table 35 * 0xddd..d - immediate value 36 * symbol - address of label or external symbol 37 * 38 * First, itbl_parse reads in the table of register and instruction 39 * names and formats, and builds a list of entries for each 40 * processor/type combination. lex and yacc are used to parse 41 * the entries in the table and call functions defined here to 42 * add each entry to our list. 43 * 44 * Then, when assembling or disassembling, these functions are called to 45 * 1) get information on a processor's registers and 46 * 2) assemble/disassemble an instruction. 47 * To assemble(disassemble) an instruction, the function 48 * itbl_assemble(itbl_disassemble) is called to search the list of 49 * instruction entries, and if a match is found, uses the format 50 * described in the instruction entry structure to complete the action. 51 * 52 * Eg. Suppose we have a Mips coprocessor "cop3" with data register "d2" 53 * and we want to define function "pig" which takes two operands. 54 * 55 * Given the table entries: 56 * "p3 insn pig 0x1:24-21 dreg:20-16 immed:15-0" 57 * "p3 dreg d2 0x2" 58 * and that the instruction encoding for coprocessor pz has encoding: 59 * #define MIPS_ENCODE_COP_NUM(z) ((0x21|(z<<1))<<25) 60 * #define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum) 61 * 62 * a structure to describe the instruction might look something like: 63 * struct itbl_entry = { 64 * e_processor processor = e_p3 65 * e_type type = e_insn 66 * char *name = "pig" 67 * uint value = 0x1 68 * uint flags = 0 69 * struct itbl_range range = 24-21 70 * struct itbl_field *field = { 71 * e_type type = e_dreg 72 * struct itbl_range range = 20-16 73 * struct itbl_field *next = { 74 * e_type type = e_immed 75 * struct itbl_range range = 15-0 76 * struct itbl_field *next = 0 77 * }; 78 * }; 79 * struct itbl_entry *next = 0 80 * }; 81 * 82 * And the assembler instructions: 83 * "pig d2,0x100" 84 * "pig $2,0x100" 85 * 86 * would both assemble to the hex value: 87 * "0x4e220100" 88 * 89 */ 90 91 #include "as.h" 92 #include "itbl-ops.h" 93 #include <itbl-parse.h> 94 95 /* #define DEBUG */ 96 97 #ifdef DEBUG 98 #include <assert.h> 99 #define ASSERT(x) gas_assert (x) 100 #define DBG(x) printf x 101 #else 102 #define ASSERT(x) 103 #define DBG(x) 104 #endif 105 106 #ifndef min 107 #define min(a,b) (a<b?a:b) 108 #endif 109 110 int itbl_have_entries = 0; 111 112 /*======================================================================*/ 113 /* structures for keeping itbl format entries */ 114 115 struct itbl_range { 116 int sbit; /* mask starting bit position */ 117 int ebit; /* mask ending bit position */ 118 }; 119 120 struct itbl_field { 121 e_type type; /* dreg/creg/greg/immed/symb */ 122 struct itbl_range range; /* field's bitfield range within instruction */ 123 unsigned long flags; /* field flags */ 124 struct itbl_field *next; /* next field in list */ 125 }; 126 127 /* These structures define the instructions and registers for a processor. 128 * If the type is an instruction, the structure defines the format of an 129 * instruction where the fields are the list of operands. 130 * The flags field below uses the same values as those defined in the 131 * gnu assembler and are machine specific. */ 132 struct itbl_entry { 133 e_processor processor; /* processor number */ 134 e_type type; /* dreg/creg/greg/insn */ 135 char *name; /* mnemionic name for insn/register */ 136 unsigned long value; /* opcode/instruction mask/register number */ 137 unsigned long flags; /* effects of the instruction */ 138 struct itbl_range range; /* bit range within instruction for value */ 139 struct itbl_field *fields; /* list of operand definitions (if any) */ 140 struct itbl_entry *next; /* next entry */ 141 }; 142 143 /* local data and structures */ 144 145 static int itbl_num_opcodes = 0; 146 /* Array of entries for each processor and entry type */ 147 static struct itbl_entry *entries[e_nprocs][e_ntypes]; 148 149 /* local prototypes */ 150 static unsigned long build_opcode (struct itbl_entry *e); 151 static e_type get_type (int yytype); 152 static e_processor get_processor (int yyproc); 153 static struct itbl_entry **get_entries (e_processor processor, 154 e_type type); 155 static struct itbl_entry *find_entry_byname (e_processor processor, 156 e_type type, char *name); 157 static struct itbl_entry *find_entry_byval (e_processor processor, 158 e_type type, unsigned long val, struct itbl_range *r); 159 static struct itbl_entry *alloc_entry (e_processor processor, 160 e_type type, char *name, unsigned long value); 161 static unsigned long apply_range (unsigned long value, struct itbl_range r); 162 static unsigned long extract_range (unsigned long value, struct itbl_range r); 163 static struct itbl_field *alloc_field (e_type type, int sbit, 164 int ebit, unsigned long flags); 165 166 /*======================================================================*/ 167 /* Interfaces to the parser */ 168 169 /* Open the table and use lex and yacc to parse the entries. 170 * Return 1 for failure; 0 for success. */ 171 172 int 173 itbl_parse (char *insntbl) 174 { 175 extern FILE *yyin; 176 extern int yyparse (void); 177 178 yyin = fopen (insntbl, FOPEN_RT); 179 if (yyin == 0) 180 { 181 printf ("Can't open processor instruction specification file \"%s\"\n", 182 insntbl); 183 return 1; 184 } 185 186 while (yyparse ()) 187 ; 188 189 fclose (yyin); 190 itbl_have_entries = 1; 191 return 0; 192 } 193 194 /* Add a register entry */ 195 196 struct itbl_entry * 197 itbl_add_reg (int yyprocessor, int yytype, char *regname, 198 int regnum) 199 { 200 return alloc_entry (get_processor (yyprocessor), get_type (yytype), regname, 201 (unsigned long) regnum); 202 } 203 204 /* Add an instruction entry */ 205 206 struct itbl_entry * 207 itbl_add_insn (int yyprocessor, char *name, unsigned long value, 208 int sbit, int ebit, unsigned long flags) 209 { 210 struct itbl_entry *e; 211 e = alloc_entry (get_processor (yyprocessor), e_insn, name, value); 212 if (e) 213 { 214 e->range.sbit = sbit; 215 e->range.ebit = ebit; 216 e->flags = flags; 217 itbl_num_opcodes++; 218 } 219 return e; 220 } 221 222 /* Add an operand to an instruction entry */ 223 224 struct itbl_field * 225 itbl_add_operand (struct itbl_entry *e, int yytype, int sbit, 226 int ebit, unsigned long flags) 227 { 228 struct itbl_field *f, **last_f; 229 if (!e) 230 return 0; 231 /* Add to end of fields' list. */ 232 f = alloc_field (get_type (yytype), sbit, ebit, flags); 233 if (f) 234 { 235 last_f = &e->fields; 236 while (*last_f) 237 last_f = &(*last_f)->next; 238 *last_f = f; 239 f->next = 0; 240 } 241 return f; 242 } 243 244 /*======================================================================*/ 245 /* Interfaces for assembler and disassembler */ 246 247 #ifndef STAND_ALONE 248 static void append_insns_as_macros (void); 249 250 /* Initialize for gas. */ 251 252 void 253 itbl_init (void) 254 { 255 struct itbl_entry *e, **es; 256 e_processor procn; 257 e_type type; 258 259 if (!itbl_have_entries) 260 return; 261 262 /* Since register names don't have a prefix, put them in the symbol table so 263 they can't be used as symbols. This simplifies argument parsing as 264 we can let gas parse registers for us. */ 265 /* Use symbol_create instead of symbol_new so we don't try to 266 output registers into the object file's symbol table. */ 267 268 for (type = e_regtype0; type < e_nregtypes; type++) 269 for (procn = e_p0; procn < e_nprocs; procn++) 270 { 271 es = get_entries (procn, type); 272 for (e = *es; e; e = e->next) 273 { 274 symbol_table_insert (symbol_create (e->name, reg_section, 275 e->value, &zero_address_frag)); 276 } 277 } 278 append_insns_as_macros (); 279 } 280 281 /* Append insns to opcodes table and increase number of opcodes 282 * Structure of opcodes table: 283 * struct itbl_opcode 284 * { 285 * const char *name; 286 * const char *args; - string describing the arguments. 287 * unsigned long match; - opcode, or ISA level if pinfo=INSN_MACRO 288 * unsigned long mask; - opcode mask, or macro id if pinfo=INSN_MACRO 289 * unsigned long pinfo; - insn flags, or INSN_MACRO 290 * }; 291 * examples: 292 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t }, 293 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO }, 294 */ 295 296 static char *form_args (struct itbl_entry *e); 297 static void 298 append_insns_as_macros (void) 299 { 300 struct ITBL_OPCODE_STRUCT *new_opcodes, *o; 301 struct itbl_entry *e, **es; 302 int n, size, new_size, new_num_opcodes; 303 #ifdef USE_MACROS 304 int id; 305 #endif 306 307 if (!itbl_have_entries) 308 return; 309 310 if (!itbl_num_opcodes) /* no new instructions to add! */ 311 { 312 return; 313 } 314 DBG (("previous num_opcodes=%d\n", ITBL_NUM_OPCODES)); 315 316 new_num_opcodes = ITBL_NUM_OPCODES + itbl_num_opcodes; 317 ASSERT (new_num_opcodes >= itbl_num_opcodes); 318 319 size = sizeof (struct ITBL_OPCODE_STRUCT) * ITBL_NUM_OPCODES; 320 ASSERT (size >= 0); 321 DBG (("I get=%d\n", size / sizeof (ITBL_OPCODES[0]))); 322 323 new_size = sizeof (struct ITBL_OPCODE_STRUCT) * new_num_opcodes; 324 ASSERT (new_size > size); 325 326 /* FIXME since ITBL_OPCODES culd be a static table, 327 we can't realloc or delete the old memory. */ 328 new_opcodes = (struct ITBL_OPCODE_STRUCT *) malloc (new_size); 329 if (!new_opcodes) 330 { 331 printf (_("Unable to allocate memory for new instructions\n")); 332 return; 333 } 334 if (size) /* copy preexisting opcodes table */ 335 memcpy (new_opcodes, ITBL_OPCODES, size); 336 337 /* FIXME! some NUMOPCODES are calculated expressions. 338 These need to be changed before itbls can be supported. */ 339 340 #ifdef USE_MACROS 341 id = ITBL_NUM_MACROS; /* begin the next macro id after the last */ 342 #endif 343 o = &new_opcodes[ITBL_NUM_OPCODES]; /* append macro to opcodes list */ 344 for (n = e_p0; n < e_nprocs; n++) 345 { 346 es = get_entries (n, e_insn); 347 for (e = *es; e; e = e->next) 348 { 349 /* name, args, mask, match, pinfo 350 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t }, 351 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO }, 352 * Construct args from itbl_fields. 353 */ 354 o->name = e->name; 355 o->args = strdup (form_args (e)); 356 o->mask = apply_range (e->value, e->range); 357 /* FIXME how to catch during assembly? */ 358 /* mask to identify this insn */ 359 o->match = apply_range (e->value, e->range); 360 o->pinfo = 0; 361 362 #ifdef USE_MACROS 363 o->mask = id++; /* FIXME how to catch during assembly? */ 364 o->match = 0; /* for macros, the insn_isa number */ 365 o->pinfo = INSN_MACRO; 366 #endif 367 368 /* Don't add instructions which caused an error */ 369 if (o->args) 370 o++; 371 else 372 new_num_opcodes--; 373 } 374 } 375 ITBL_OPCODES = new_opcodes; 376 ITBL_NUM_OPCODES = new_num_opcodes; 377 378 /* FIXME 379 At this point, we can free the entries, as they should have 380 been added to the assembler's tables. 381 Don't free name though, since name is being used by the new 382 opcodes table. 383 384 Eventually, we should also free the new opcodes table itself 385 on exit. 386 */ 387 } 388 389 static char * 390 form_args (struct itbl_entry *e) 391 { 392 static char s[31]; 393 char c = 0, *p = s; 394 struct itbl_field *f; 395 396 ASSERT (e); 397 for (f = e->fields; f; f = f->next) 398 { 399 switch (f->type) 400 { 401 case e_dreg: 402 c = 'd'; 403 break; 404 case e_creg: 405 c = 't'; 406 break; 407 case e_greg: 408 c = 's'; 409 break; 410 case e_immed: 411 c = 'i'; 412 break; 413 case e_addr: 414 c = 'a'; 415 break; 416 default: 417 c = 0; /* ignore; unknown field type */ 418 } 419 if (c) 420 { 421 if (p != s) 422 *p++ = ','; 423 *p++ = c; 424 } 425 } 426 *p = 0; 427 return s; 428 } 429 #endif /* !STAND_ALONE */ 430 431 /* Get processor's register name from val */ 432 433 int 434 itbl_get_reg_val (char *name, unsigned long *pval) 435 { 436 e_type t; 437 e_processor p; 438 439 for (p = e_p0; p < e_nprocs; p++) 440 { 441 for (t = e_regtype0; t < e_nregtypes; t++) 442 { 443 if (itbl_get_val (p, t, name, pval)) 444 return 1; 445 } 446 } 447 return 0; 448 } 449 450 char * 451 itbl_get_name (e_processor processor, e_type type, unsigned long val) 452 { 453 struct itbl_entry *r; 454 /* type depends on instruction passed */ 455 r = find_entry_byval (processor, type, val, 0); 456 if (r) 457 return r->name; 458 else 459 return 0; /* error; invalid operand */ 460 } 461 462 /* Get processor's register value from name */ 463 464 int 465 itbl_get_val (e_processor processor, e_type type, char *name, 466 unsigned long *pval) 467 { 468 struct itbl_entry *r; 469 /* type depends on instruction passed */ 470 r = find_entry_byname (processor, type, name); 471 if (r == NULL) 472 return 0; 473 *pval = r->value; 474 return 1; 475 } 476 477 /* Assemble instruction "name" with operands "s". 478 * name - name of instruction 479 * s - operands 480 * returns - long word for assembled instruction */ 481 482 unsigned long 483 itbl_assemble (char *name, char *s) 484 { 485 unsigned long opcode; 486 struct itbl_entry *e = NULL; 487 struct itbl_field *f; 488 char *n; 489 int processor; 490 491 if (!name || !*name) 492 return 0; /* error! must have an opcode name/expr */ 493 494 /* find entry in list of instructions for all processors */ 495 for (processor = 0; processor < e_nprocs; processor++) 496 { 497 e = find_entry_byname (processor, e_insn, name); 498 if (e) 499 break; 500 } 501 if (!e) 502 return 0; /* opcode not in table; invalid instruction */ 503 opcode = build_opcode (e); 504 505 /* parse opcode's args (if any) */ 506 for (f = e->fields; f; f = f->next) /* for each arg, ... */ 507 { 508 struct itbl_entry *r; 509 unsigned long value; 510 if (!s || !*s) 511 return 0; /* error - not enough operands */ 512 n = itbl_get_field (&s); 513 /* n should be in form $n or 0xhhh (are symbol names valid?? */ 514 switch (f->type) 515 { 516 case e_dreg: 517 case e_creg: 518 case e_greg: 519 /* Accept either a string name 520 * or '$' followed by the register number */ 521 if (*n == '$') 522 { 523 n++; 524 value = strtol (n, 0, 10); 525 /* FIXME! could have "0l"... then what?? */ 526 if (value == 0 && *n != '0') 527 return 0; /* error; invalid operand */ 528 } 529 else 530 { 531 r = find_entry_byname (e->processor, f->type, n); 532 if (r) 533 value = r->value; 534 else 535 return 0; /* error; invalid operand */ 536 } 537 break; 538 case e_addr: 539 /* use assembler's symbol table to find symbol */ 540 /* FIXME!! Do we need this? 541 if so, what about relocs?? 542 my_getExpression (&imm_expr, s); 543 return 0; /-* error; invalid operand *-/ 544 break; 545 */ 546 /* If not a symbol, fall thru to IMMED */ 547 case e_immed: 548 if (*n == '0' && *(n + 1) == 'x') /* hex begins 0x... */ 549 { 550 n += 2; 551 value = strtol (n, 0, 16); 552 /* FIXME! could have "0xl"... then what?? */ 553 } 554 else 555 { 556 value = strtol (n, 0, 10); 557 /* FIXME! could have "0l"... then what?? */ 558 if (value == 0 && *n != '0') 559 return 0; /* error; invalid operand */ 560 } 561 break; 562 default: 563 return 0; /* error; invalid field spec */ 564 } 565 opcode |= apply_range (value, f->range); 566 } 567 if (s && *s) 568 return 0; /* error - too many operands */ 569 return opcode; /* done! */ 570 } 571 572 /* Disassemble instruction "insn". 573 * insn - instruction 574 * s - buffer to hold disassembled instruction 575 * returns - 1 if succeeded; 0 if failed 576 */ 577 578 int 579 itbl_disassemble (char *s, unsigned long insn) 580 { 581 e_processor processor; 582 struct itbl_entry *e; 583 struct itbl_field *f; 584 585 if (!ITBL_IS_INSN (insn)) 586 return 0; /* error */ 587 processor = get_processor (ITBL_DECODE_PNUM (insn)); 588 589 /* find entry in list */ 590 e = find_entry_byval (processor, e_insn, insn, 0); 591 if (!e) 592 return 0; /* opcode not in table; invalid instruction */ 593 strcpy (s, e->name); 594 595 /* Parse insn's args (if any). */ 596 for (f = e->fields; f; f = f->next) /* for each arg, ... */ 597 { 598 struct itbl_entry *r; 599 unsigned long value; 600 char s_value[20]; 601 602 if (f == e->fields) /* First operand is preceded by tab. */ 603 strcat (s, "\t"); 604 else /* ','s separate following operands. */ 605 strcat (s, ","); 606 value = extract_range (insn, f->range); 607 /* n should be in form $n or 0xhhh (are symbol names valid?? */ 608 switch (f->type) 609 { 610 case e_dreg: 611 case e_creg: 612 case e_greg: 613 /* Accept either a string name 614 or '$' followed by the register number. */ 615 r = find_entry_byval (e->processor, f->type, value, &f->range); 616 if (r) 617 strcat (s, r->name); 618 else 619 { 620 sprintf (s_value, "$%lu", value); 621 strcat (s, s_value); 622 } 623 break; 624 case e_addr: 625 /* Use assembler's symbol table to find symbol. */ 626 /* FIXME!! Do we need this? If so, what about relocs?? */ 627 /* If not a symbol, fall through to IMMED. */ 628 case e_immed: 629 sprintf (s_value, "0x%lx", value); 630 strcat (s, s_value); 631 break; 632 default: 633 return 0; /* error; invalid field spec */ 634 } 635 } 636 return 1; /* Done! */ 637 } 638 639 /*======================================================================*/ 640 /* 641 * Local functions for manipulating private structures containing 642 * the names and format for the new instructions and registers 643 * for each processor. 644 */ 645 646 /* Calculate instruction's opcode and function values from entry */ 647 648 static unsigned long 649 build_opcode (struct itbl_entry *e) 650 { 651 unsigned long opcode; 652 653 opcode = apply_range (e->value, e->range); 654 opcode |= ITBL_ENCODE_PNUM (e->processor); 655 return opcode; 656 } 657 658 /* Calculate absolute value given the relative value and bit position range 659 * within the instruction. 660 * The range is inclusive where 0 is least significant bit. 661 * A range of { 24, 20 } will have a mask of 662 * bit 3 2 1 663 * pos: 1098 7654 3210 9876 5432 1098 7654 3210 664 * bin: 0000 0001 1111 0000 0000 0000 0000 0000 665 * hex: 0 1 f 0 0 0 0 0 666 * mask: 0x01f00000. 667 */ 668 669 static unsigned long 670 apply_range (unsigned long rval, struct itbl_range r) 671 { 672 unsigned long mask; 673 unsigned long aval; 674 int len = MAX_BITPOS - r.sbit; 675 676 ASSERT (r.sbit >= r.ebit); 677 ASSERT (MAX_BITPOS >= r.sbit); 678 ASSERT (r.ebit >= 0); 679 680 /* create mask by truncating 1s by shifting */ 681 mask = 0xffffffff << len; 682 mask = mask >> len; 683 mask = mask >> r.ebit; 684 mask = mask << r.ebit; 685 686 aval = (rval << r.ebit) & mask; 687 return aval; 688 } 689 690 /* Calculate relative value given the absolute value and bit position range 691 * within the instruction. */ 692 693 static unsigned long 694 extract_range (unsigned long aval, struct itbl_range r) 695 { 696 unsigned long mask; 697 unsigned long rval; 698 int len = MAX_BITPOS - r.sbit; 699 700 /* create mask by truncating 1s by shifting */ 701 mask = 0xffffffff << len; 702 mask = mask >> len; 703 mask = mask >> r.ebit; 704 mask = mask << r.ebit; 705 706 rval = (aval & mask) >> r.ebit; 707 return rval; 708 } 709 710 /* Extract processor's assembly instruction field name from s; 711 * forms are "n args" "n,args" or "n" */ 712 /* Return next argument from string pointer "s" and advance s. 713 * delimiters are " ,()" */ 714 715 char * 716 itbl_get_field (char **S) 717 { 718 static char n[128]; 719 char *s; 720 int len; 721 722 s = *S; 723 if (!s || !*s) 724 return 0; 725 /* FIXME: This is a weird set of delimiters. */ 726 len = strcspn (s, " \t,()"); 727 ASSERT (128 > len + 1); 728 strncpy (n, s, len); 729 n[len] = 0; 730 if (s[len] == '\0') 731 s = 0; /* no more args */ 732 else 733 s += len + 1; /* advance to next arg */ 734 735 *S = s; 736 return n; 737 } 738 739 /* Search entries for a given processor and type 740 * to find one matching the name "n". 741 * Return a pointer to the entry */ 742 743 static struct itbl_entry * 744 find_entry_byname (e_processor processor, 745 e_type type, char *n) 746 { 747 struct itbl_entry *e, **es; 748 749 es = get_entries (processor, type); 750 for (e = *es; e; e = e->next) /* for each entry, ... */ 751 { 752 if (!strcmp (e->name, n)) 753 return e; 754 } 755 return 0; 756 } 757 758 /* Search entries for a given processor and type 759 * to find one matching the value "val" for the range "r". 760 * Return a pointer to the entry. 761 * This function is used for disassembling fields of an instruction. 762 */ 763 764 static struct itbl_entry * 765 find_entry_byval (e_processor processor, e_type type, 766 unsigned long val, struct itbl_range *r) 767 { 768 struct itbl_entry *e, **es; 769 unsigned long eval; 770 771 es = get_entries (processor, type); 772 for (e = *es; e; e = e->next) /* for each entry, ... */ 773 { 774 if (processor != e->processor) 775 continue; 776 /* For insns, we might not know the range of the opcode, 777 * so a range of 0 will allow this routine to match against 778 * the range of the entry to be compared with. 779 * This could cause ambiguities. 780 * For operands, we get an extracted value and a range. 781 */ 782 /* if range is 0, mask val against the range of the compared entry. */ 783 if (r == 0) /* if no range passed, must be whole 32-bits 784 * so create 32-bit value from entry's range */ 785 { 786 eval = apply_range (e->value, e->range); 787 val &= apply_range (0xffffffff, e->range); 788 } 789 else if ((r->sbit == e->range.sbit && r->ebit == e->range.ebit) 790 || (e->range.sbit == 0 && e->range.ebit == 0)) 791 { 792 eval = apply_range (e->value, *r); 793 val = apply_range (val, *r); 794 } 795 else 796 continue; 797 if (val == eval) 798 return e; 799 } 800 return 0; 801 } 802 803 /* Return a pointer to the list of entries for a given processor and type. */ 804 805 static struct itbl_entry ** 806 get_entries (e_processor processor, e_type type) 807 { 808 return &entries[processor][type]; 809 } 810 811 /* Return an integral value for the processor passed from yyparse. */ 812 813 static e_processor 814 get_processor (int yyproc) 815 { 816 /* translate from yacc's processor to enum */ 817 if (yyproc >= e_p0 && yyproc < e_nprocs) 818 return (e_processor) yyproc; 819 return e_invproc; /* error; invalid processor */ 820 } 821 822 /* Return an integral value for the entry type passed from yyparse. */ 823 824 static e_type 825 get_type (int yytype) 826 { 827 switch (yytype) 828 { 829 /* translate from yacc's type to enum */ 830 case INSN: 831 return e_insn; 832 case DREG: 833 return e_dreg; 834 case CREG: 835 return e_creg; 836 case GREG: 837 return e_greg; 838 case ADDR: 839 return e_addr; 840 case IMMED: 841 return e_immed; 842 default: 843 return e_invtype; /* error; invalid type */ 844 } 845 } 846 847 /* Allocate and initialize an entry */ 848 849 static struct itbl_entry * 850 alloc_entry (e_processor processor, e_type type, 851 char *name, unsigned long value) 852 { 853 struct itbl_entry *e, **es; 854 if (!name) 855 return 0; 856 e = (struct itbl_entry *) malloc (sizeof (struct itbl_entry)); 857 if (e) 858 { 859 memset (e, 0, sizeof (struct itbl_entry)); 860 e->name = (char *) malloc (sizeof (strlen (name)) + 1); 861 if (e->name) 862 strcpy (e->name, name); 863 e->processor = processor; 864 e->type = type; 865 e->value = value; 866 es = get_entries (e->processor, e->type); 867 e->next = *es; 868 *es = e; 869 } 870 return e; 871 } 872 873 /* Allocate and initialize an entry's field */ 874 875 static struct itbl_field * 876 alloc_field (e_type type, int sbit, int ebit, 877 unsigned long flags) 878 { 879 struct itbl_field *f; 880 f = (struct itbl_field *) malloc (sizeof (struct itbl_field)); 881 if (f) 882 { 883 memset (f, 0, sizeof (struct itbl_field)); 884 f->type = type; 885 f->range.sbit = sbit; 886 f->range.ebit = ebit; 887 f->flags = flags; 888 } 889 return f; 890 } 891
