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Searched
refs:AFGR64RegClass
(Results
1 - 9
of
9
) sorted by null
/external/llvm/lib/Target/Mips/
MipsOptionRecord.h
50
AFGR64RegClass
= &(TRI->getRegClass(Mips::AFGR64RegClassID));
68
const MCRegisterClass *
AFGR64RegClass
;
MipsRegisterInfo.cpp
176
for (RegIter Reg = Mips::
AFGR64RegClass
.begin(),
177
EReg = Mips::
AFGR64RegClass
.end(); Reg != EReg; ++Reg)
MipsSEInstrInfo.cpp
138
else if (Mips::
AFGR64RegClass
.contains(DestReg, SrcReg))
203
else if (Mips::
AFGR64RegClass
.hasSubClassEq(RC))
276
else if (Mips::
AFGR64RegClass
.hasSubClassEq(RC))
MipsSEFrameLowering.cpp
297
FP64 ? &Mips::FGR64RegClass : &Mips::
AFGR64RegClass
;
359
FP64 ? &Mips::FGR64RegClass : &Mips::
AFGR64RegClass
;
439
if (Mips::
AFGR64RegClass
.contains(Reg)) {
[
all
...]
MipsAsmPrinter.cpp
259
unsigned AFGR64RegSize = Mips::
AFGR64RegClass
.getSize();
272
} else if (Mips::
AFGR64RegClass
.contains(Reg)) {
[
all
...]
MipsFastISel.cpp
339
const TargetRegisterClass *RC = &Mips::
AFGR64RegClass
;
736
ResultReg = createResultReg(&Mips::
AFGR64RegClass
);
951
unsigned DestReg = createResultReg(&Mips::
AFGR64RegClass
);
975
RC = &Mips::
AFGR64RegClass
;
[
all
...]
MipsISelLowering.cpp
[
all
...]
MipsSEISelLowering.cpp
110
addRegisterClass(MVT::f64, &Mips::
AFGR64RegClass
);
[
all
...]
/external/llvm/lib/Target/Mips/MCTargetDesc/
MipsOptionRecord.cpp
87
AFGR64RegClass
->contains(CurrentSubReg) ||
Completed in 312 milliseconds