/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 695 /// OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) 697 ATOMIC_STORE, [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 162 setOperationAction(ISD::ATOMIC_STORE, MVT::i32, Custom); 229 case ISD::ATOMIC_STORE: return LowerATOMIC_STORE(Op, DAG); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 78 case ISD::ATOMIC_STORE: return "AtomicStore";
|
SelectionDAG.cpp | 502 case ISD::ATOMIC_STORE: { [all...] |
LegalizeIntegerTypes.cpp | [all...] |
LegalizeDAG.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 273 setTargetDAGCombine(ISD::ATOMIC_STORE); [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 170 // Lower ATOMIC_LOAD and ATOMIC_STORE into normal volatile loads and 173 setOperationAction(ISD::ATOMIC_STORE, VT, Custom); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | 608 Use->getOpcode() != ISD::ATOMIC_STORE) [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 396 setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 481 setOperationAction(ISD::ATOMIC_STORE, VT, Custom); [all...] |