| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 158 unsigned &SrcReg2, int &CmpMask,
163 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| AArch64InstrInfo.cpp | 652 unsigned &SrcReg2, int &CmpMask,
672 CmpMask = ~0;
681 CmpMask = ~0;
691 CmpMask = ~0;
828 MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 256 unsigned &SrcReg2, int &CmpMask,
264 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 506 unsigned &SrcReg2, int &CmpMask,
513 unsigned SrcReg2, int CmpMask, int CmpValue,
|
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 567 int CmpMask, CmpValue;
568 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) ||
574 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonHardwareLoops.cpp | 450 int CmpImm = 0, CmpMask = 0;
452 CmpMask, CmpImm);
[all...] |
