/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class1_chroma.s | 200 VTBL.8 D24,{D7},D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 204 VZIP.8 D24,D25 205 @VTBL.8 D24,D7,D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 210 VADDW.S8 Q13,Q13,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 250 VTBL.8 D24,{D7},D22 252 VZIP.8 D24,D25 254 @VTBL.8 D24,D7,D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 256 VADDW.S8 Q13,Q13,D24 @pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 349 VTBL.8 D24,{D7},D22 353 VZIP.8 D24,D2 [all...] |
ihevc_sao_edge_offset_class1.s | 192 VTBL.8 D24,{D7},D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 199 VADDW.S8 Q13,Q13,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 236 VTBL.8 D24,{D7},D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 238 VADDW.S8 Q13,Q13,D24 @pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 322 VTBL.8 D24,{D7},D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 325 VADDW.S8 Q13,Q13,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 354 VTBL.8 D24,{D7},D22 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 356 VADDW.S8 Q13,Q13,D24 @pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset)
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ihevc_sao_edge_offset_class2_chroma.s | 526 VTBL.8 D24,{D6},D26 @II 534 VZIP.8 D24,D25 @II 540 VADDW.S8 Q14,Q14,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) [all...] |
ihevc_sao_band_offset_chroma.s | 311 VSUB.I8 D24,D22,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v) 320 VTBX.8 D22,{D9-D12},D24 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v)) 371 VSUB.I8 D24,D22,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v) 379 VTBX.8 D22,{D9-D12},D24 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v))
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ihevc_sao_edge_offset_class0_chroma.s | 222 VTBL.8 D24,{D10},D24 @II vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) 231 VUZP.8 D24,D25 @II 234 VTBL.8 D26,{D11},D24 @II offset = vtbl1_s8(offset_tbl_u, vget_low_s8(edge_idx))
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ihevc_sao_edge_offset_class3_chroma.s | 526 VTBL.8 D24,{D6},D26 @II 534 VZIP.8 D24,D25 @II 540 VADDW.S8 Q14,Q14,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) [all...] |
ihevc_sao_edge_offset_class3.s | 420 VTBL.8 D24,{D7},D26 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 427 VADDW.S8 Q14,Q14,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) 518 VTBL.8 D24,{D7},D26 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 520 VADDW.S8 Q10,Q10,D24 @pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) [all...] |
ihevc_sao_edge_offset_class0.s | 312 VTBL.8 D24,{D10},D24 @vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) 320 VTBL.8 D26,{D11},D24 @offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx))
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ihevc_sao_edge_offset_class2.s | 300 VTBL.8 D18,{D6},D24 @I vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx)) 393 VTBL.8 D24,{D7},D22 @II offset = vtbl1_s8(offset_tbl, vget_low_s8(edge_idx)) 400 VADDW.S8 Q13,Q13,D24 @II pi2_tmp_cur_row.val[0] = vaddw_s8(pi2_tmp_cur_row.val[0], offset) [all...] |
/external/llvm/test/MC/MachO/ |
x86_32-symbols.s | 77 D24: 1026 // CHECK: Name: D24 (83) [all...] |
x86_64-symbols.s | 77 D24: 322 // CHECK-NEXT: Name: D24 (94)
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
pred_lt4_1_neon.s | 76 VDUP.S16 D24, r12 88 VEXT.S16 D15, D15, D24, #1
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Dot_p_neon.s | 56 VMLAL.S16 Q15, D24, D8
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Syn_filt_32_neon.s | 116 VMOV.S32 r11, D24[0] @r11 --- L_tmp >>= 4
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
armVCM4P10_DeblockingChroma_unsafe_s.s | 86 dQ_0n DN D24.U8 100 dQ_0n DN D24.U8 ;Temp2 108 ;// Outputs - Pixels - P0-P1: D29-D30, Q0-Q1: D24-D25 184 ;// Outputs - Pixels - P0-P2: D29-D31, Q0-Q2: D24,D25,D28
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omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 79 dRown1 DN D24.U8 91 ;// dQ_0n DN D24.U8 ;!!;Temp2 101 dRow1n DN D24.U8 160 dRp0q0 DN D24.U8 174 dQ_0n DN D24.U8 203 dQ_0n DN D24.U8 ;!!;Temp2
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armVCM4P10_DeblockingLuma_unsafe_s.s | 78 dRp0q0 DN D24.U8 92 dQ_0n DN D24.U8 121 dQ_0n DN D24.U8 ;!!;Temp2 131 ;// Outputs - Pixels - P0-P1: D29-D30, Q0-Q1: D24-D25 265 ;// Outputs - Pixels - P0-P2: D29-D31, Q0-Q2: D24,D25,D28
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omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 114 dRp0q0 DN D24.U8 128 dQ_0n DN D24.U8 157 dQ_0n DN D24.U8 ;!!;Temp2
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omxVCM4P10_FilterDeblockingChroma_HorEdge_I_s.s | 99 dQ_0n DN D24.U8
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omxVCM4P10_PredictIntra_16x16_s.s | 99 dV0 DN D24.S32 111 dHV10 DN D24.S64
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omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 115 dQ_0n DN D24.U8
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/art/runtime/arch/arm64/ |
registers_arm64.h | 138 D24 = 24,
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context_arm64.cc | 114 fprs_[D24] = nullptr;
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/art/compiler/utils/arm/ |
constants_arm.h | 86 D24 = 24,
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/external/llvm/lib/Target/AArch64/ |
AArch64PBQPRegAlloc.cpp | 125 case AArch64::D24:
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