/prebuilts/go/darwin-x86/src/math/ |
sin_386.s | 10 FCOS // F0=cos(x) if -2**63 < x < 2**63 24 FCOS // F0=cos(reduced_x)
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/prebuilts/go/linux-x86/src/math/ |
sin_386.s | 10 FCOS // F0=cos(x) if -2**63 < x < 2**63 24 FCOS // F0=cos(reduced_x)
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/ndk/sources/host-tools/nawk-20071023/ |
awk.h | 124 #define FCOS 10
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lex.c | 54 { "cos", FCOS, BLTIN },
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run.c | [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 511 /// FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 515 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, 528 /// FSINCOS - Compute both fsin and fcos as a single operation. [all...] |
BasicTTIImpl.h | 624 ISD = ISD::FCOS;
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/prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/x86/ |
anames.go | 311 "FCOS",
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/prebuilts/go/darwin-x86/src/cmd/internal/obj/x86/ |
anames.go | 308 "FCOS",
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/prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/internal/obj/x86/ |
anames.go | 311 "FCOS",
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/prebuilts/go/linux-x86/src/cmd/internal/obj/x86/ |
anames.go | 308 "FCOS",
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/prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
intel.go | 280 case FCHS, FABS, FTST, FLDPI, FLDL2E, FLDLG2, F2XM1, FXAM, FLD1, FLDL2T, FSQRT, FRNDINT, FCOS, FSIN:
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/prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
intel.go | 280 case FCHS, FABS, FTST, FLDPI, FLDL2E, FLDLG2, F2XM1, FXAM, FLD1, FLDL2T, FSQRT, FRNDINT, FCOS, FSIN:
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/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 160 case ISD::FCOS: return "fcos";
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LegalizeVectorOps.cpp | 309 case ISD::FCOS: [all...] |
LegalizeFloatTypes.cpp | 82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break; [all...] |
LegalizeDAG.cpp | [all...] |
LegalizeVectorTypes.cpp | 79 case ISD::FCOS: 634 case ISD::FCOS: [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 135 for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW,
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/external/llvm/lib/Target/AMDGPU/ |
R600ISelLowering.cpp | 64 setOperationAction(ISD::FCOS, MVT::f32, Custom); 599 case ISD::FCOS: [all...] |
SIISelLowering.cpp | 81 setOperationAction(ISD::FCOS, MVT::f32, Custom); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 152 setOperationAction(ISD::FCOS, MVT::f128, Expand); 267 setOperationAction(ISD::FCOS, MVT::f32, Expand); 268 setOperationAction(ISD::FCOS, MVT::f64, Expand); 289 setOperationAction(ISD::FCOS, MVT::f16, Promote); 331 setOperationAction(ISD::FCOS, MVT::v4f16, Expand); 361 setOperationAction(ISD::FCOS, MVT::v8f16, Expand); 534 setOperationAction(ISD::FCOS, MVT::v1f64, Expand); 649 setOperationAction(ISD::FCOS, VT.getSimpleVT(), Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 361 setOperationAction(ISD::FCOS, MVT::f32, Expand); 362 setOperationAction(ISD::FCOS, MVT::f64, Expand); [all...] |