/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 524 /// FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that 526 FMINNAN, FMAXNAN, [all...] |
SelectionDAG.h | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 155 case ISD::FMINNAN: return "fminnan";
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LegalizeVectorOps.cpp | 304 case ISD::FMINNAN: [all...] |
LegalizeVectorTypes.cpp | 112 case ISD::FMINNAN: 672 case ISD::FMINNAN: [all...] |
SelectionDAGBuilder.cpp | [all...] |
LegalizeFloatTypes.cpp | [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 144 setOperationAction(ISD::FMINNAN, T, Legal);
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/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | 790 setOperationAction(ISD::FMINNAN, VT, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 307 setOperationAction(ISD::FMINNAN, MVT::f16, Promote); 399 setOperationAction(ISD::FMINNAN, Ty, Legal); 702 for (unsigned Opcode : {ISD::FMINNAN, ISD::FMAXNAN, [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |