| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 457 /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
458 /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
476 /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
477 FP_EXTEND,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 622 case ISD::FP_EXTEND:
698 case ISD::FP_EXTEND:
[all...] |
| LegalizeFloatTypes.cpp | 94 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
441 // hard-float FP_EXTEND rather than FP16_TO_FP.
443 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
450 // If the promotion did the FP_EXTEND to the destination type for us,
460 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
464 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
476 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
631 // Do a non-extending load followed by FP_EXTEND.
641 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
[all...] |
| LegalizeDAG.cpp | 460 Result = DAG.getNode(VT.isFloatingPoint() ? ISD::FP_EXTEND :
[all...] |
| LegalizeVectorOps.cpp | 324 case ISD::FP_EXTEND:
416 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Op.getOperand(j));
[all...] |
| SelectionDAGDumper.cpp | 251 case ISD::FP_EXTEND: return "fp_extend";
|
| LegalizeVectorTypes.cpp | 88 case ISD::FP_EXTEND:
643 case ISD::FP_EXTEND:
[all...] |
| SelectionDAG.cpp | 233 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
[all...] |
| SelectionDAGBuilder.cpp | 229 return DAG.getNode(ISD::FP_EXTEND, DL, ValueVT, Val);
393 Val = DAG.getNode(ISD::FP_EXTEND, DL, PartVT, Val);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 58 { ISD::FP_EXTEND, MVT::v2f32, 2 },
59 { ISD::FP_EXTEND, MVT::v4f32, 4 }
63 ISD == ISD::FP_EXTEND)) {
|
| ARMISelLowering.cpp | 575 setOperationAction(ISD::FP_EXTEND, MVT::v2f64, Expand);
682 setOperationAction(ISD::FP_EXTEND, MVT::f64, Custom);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 551 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 },
552 { ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 },
635 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 3 },
[all...] |
| X86ISelDAGToDAG.cpp | 592 if (N->getOpcode() != ISD::FP_ROUND && N->getOpcode() != ISD::FP_EXTEND)
613 if (N->getOpcode() == ISD::FP_EXTEND)
641 // We're about to replace all uses of the FP_ROUND/FP_EXTEND with the
[all...] |
| X86IntrinsicsInfo.h | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 193 setOperationAction(ISD::FP_EXTEND, MVT::v2f64, Expand);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 691 setOperationAction(ISD::FP_EXTEND, MVT::v4f64, Legal);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 169 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom);
316 setOperationAction(ISD::FP_EXTEND, MVT::v4f16, Promote);
322 AddPromotedToType(ISD::FP_EXTEND, MVT::v4f16, MVT::v4f32);
382 setOperationAction(ISD::FP_EXTEND, MVT::v8f16, Expand);
554 setOperationAction(ISD::FP_EXTEND, MVT::v1f64, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
