/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.h | 55 SmallVectorImpl<MCFixup> &Fixups, 61 SmallVectorImpl<MCFixup> &Fixups, 68 SmallVectorImpl<MCFixup> &Fixups, 75 SmallVectorImpl<MCFixup> &Fixups, 81 SmallVectorImpl<MCFixup> &Fixups, 85 SmallVectorImpl<MCFixup> &Fixups, 89 SmallVectorImpl<MCFixup> &Fixups, 95 SmallVectorImpl<MCFixup> &Fixups, 102 SmallVectorImpl<MCFixup> &Fixups, 109 SmallVectorImpl<MCFixup> &Fixups, [all...] |
MipsMCCodeEmitter.cpp | 149 SmallVectorImpl<MCFixup> &Fixups, 172 unsigned long N = Fixups.size(); 173 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); 198 if (Fixups.size() > N) 199 Fixups.pop_back(); 203 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); 222 SmallVectorImpl<MCFixup> &Fixups, 235 Fixups.push_back(MCFixup::create(0, FixupExpression, 245 SmallVectorImpl<MCFixup> &Fixups, 257 Fixups.push_back(MCFixup::create(0, Expr [all...] |
MipsFixupKinds.h | 25 enum Fixups { 26 // Branch fixups resulting in R_MIPS_NONE. 29 // Branch fixups resulting in R_MIPS_16.
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
AMDGPUMCCodeEmitter.h | 29 SmallVectorImpl<MCFixup> &Fixups) const; 32 SmallVectorImpl<MCFixup> &Fixups) const { 37 SmallVectorImpl<MCFixup> &Fixups) const { 41 SmallVectorImpl<MCFixup> &Fixups) const { 48 SmallVectorImpl<MCFixup> &Fixups) const { 52 SmallVectorImpl<MCFixup> &Fixups) const {
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R600MCCodeEmitter.cpp | 54 SmallVectorImpl<MCFixup> &Fixups) const; 58 SmallVectorImpl<MCFixup> &Fixups) const; 61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups, 66 SmallVectorImpl<MCFixup> &Fixups, 68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups, 151 SmallVectorImpl<MCFixup> &Fixups) const { 153 EmitTexInstr(MI, Fixups, OS); 164 uint64_t inst = getBinaryCodeForInstr(MI, Fixups); 176 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups); 186 EmitALUInstr(MI, Fixups, OS) [all...] |
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
AMDGPUMCCodeEmitter.h | 32 SmallVectorImpl<MCFixup> &Fixups, 36 SmallVectorImpl<MCFixup> &Fixups, 42 SmallVectorImpl<MCFixup> &Fixups,
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AMDGPUFixupKinds.h | 17 enum Fixups {
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SIMCCodeEmitter.cpp | 55 SmallVectorImpl<MCFixup> &Fixups, 60 SmallVectorImpl<MCFixup> &Fixups, 66 SmallVectorImpl<MCFixup> &Fixups, 182 SmallVectorImpl<MCFixup> &Fixups, 185 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups, STI); 229 SmallVectorImpl<MCFixup> &Fixups, 236 Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc())); 240 return getMachineOpValue(MI, MO, Fixups, STI); 245 SmallVectorImpl<MCFixup> &Fixups, 253 Fixups.push_back(MCFixup::create(4, Expr, Kind, MI.getLoc())) [all...] |
R600MCCodeEmitter.cpp | 45 SmallVectorImpl<MCFixup> &Fixups, 50 SmallVectorImpl<MCFixup> &Fixups, 89 SmallVectorImpl<MCFixup> &Fixups, 99 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI); 123 uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups, STI); 133 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI);
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
SystemZMCCodeEmitter.cpp | 41 SmallVectorImpl<MCFixup> &Fixups, 47 SmallVectorImpl<MCFixup> &Fixups, 51 // MO in MI. Fixups is the list of fixups against MI. 53 SmallVectorImpl<MCFixup> &Fixups, 61 SmallVectorImpl<MCFixup> &Fixups, 64 SmallVectorImpl<MCFixup> &Fixups, 67 SmallVectorImpl<MCFixup> &Fixups, 70 SmallVectorImpl<MCFixup> &Fixups, 73 SmallVectorImpl<MCFixup> &Fixups, [all...] |
/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
PPCMCCodeEmitter.cpp | 52 SmallVectorImpl<MCFixup> &Fixups, 55 SmallVectorImpl<MCFixup> &Fixups, 58 SmallVectorImpl<MCFixup> &Fixups, 61 SmallVectorImpl<MCFixup> &Fixups, 64 SmallVectorImpl<MCFixup> &Fixups, 67 SmallVectorImpl<MCFixup> &Fixups, 70 SmallVectorImpl<MCFixup> &Fixups, 73 SmallVectorImpl<MCFixup> &Fixups, 76 SmallVectorImpl<MCFixup> &Fixups, 79 SmallVectorImpl<MCFixup> &Fixups, [all...] |
PPCFixupKinds.h | 19 enum Fixups {
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/external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
WebAssemblyMCCodeEmitter.cpp | 43 SmallVectorImpl<MCFixup> &Fixups, 49 SmallVectorImpl<MCFixup> &Fixups, 53 SmallVectorImpl<MCFixup> &Fixups, 57 SmallVectorImpl<MCFixup> &Fixups, 69 const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups, 86 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, 94 SmallVectorImpl<MCFixup> &Fixups,
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
SparcMCCodeEmitter.cpp | 45 SmallVectorImpl<MCFixup> &Fixups, 51 SmallVectorImpl<MCFixup> &Fixups, 57 SmallVectorImpl<MCFixup> &Fixups, 61 SmallVectorImpl<MCFixup> &Fixups, 64 SmallVectorImpl<MCFixup> &Fixups, 67 SmallVectorImpl<MCFixup> &Fixups, 70 SmallVectorImpl<MCFixup> &Fixups, 83 SmallVectorImpl<MCFixup> &Fixups, 85 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); 105 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI) [all...] |
SparcFixupKinds.h | 17 enum Fixups { 70 /// fixups for Thread Local Storage
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SparcMCExpr.h | 85 Sparc::Fixups getFixupKind() const { return getFixupKind(Kind); } 107 static Sparc::Fixups getFixupKind(VariantKind Kind);
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86FixupKinds.h | 17 enum Fixups {
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64MCCodeEmitter.cpp | 32 STATISTIC(MCNumFixups, "Number of MC fixups created."); 49 SmallVectorImpl<MCFixup> &Fixups, 55 SmallVectorImpl<MCFixup> &Fixups, 63 SmallVectorImpl<MCFixup> &Fixups, 69 SmallVectorImpl<MCFixup> &Fixups, 75 SmallVectorImpl<MCFixup> &Fixups, 81 SmallVectorImpl<MCFixup> &Fixups, 87 SmallVectorImpl<MCFixup> &Fixups, 94 SmallVectorImpl<MCFixup> &Fixups, 100 SmallVectorImpl<MCFixup> &Fixups, [all...] |
AArch64FixupKinds.h | 18 enum Fixups { 31 // fixup_aarch64_ldst_imm12_* - unsigned 12-bit fixups for load and
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
HexagonMCCodeEmitter.h | 37 const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups, 48 SmallVectorImpl<MCFixup> &Fixups, 52 SmallVectorImpl<MCFixup> &Fixups, 59 SmallVectorImpl<MCFixup> &Fixups, 64 SmallVectorImpl<MCFixup> &Fixups,
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 69 SmallVectorImpl<MCFixup> &Fixups, 75 SmallVectorImpl<MCFixup> &Fixups, 82 SmallVectorImpl<MCFixup> &Fixups, 87 SmallVectorImpl<MCFixup> &Fixups, 93 SmallVectorImpl<MCFixup> &Fixups, 99 SmallVectorImpl<MCFixup> &Fixups, 104 SmallVectorImpl<MCFixup> &Fixups, 109 SmallVectorImpl<MCFixup> &Fixups, 114 SmallVectorImpl<MCFixup> &Fixups, 120 SmallVectorImpl<MCFixup> &Fixups, [all...] |
ARMFixupKinds.h | 17 enum Fixups { 62 // The following fixups handle the ARM BL instructions. These can be 69 // fixup_arm_uncondbl and fixup_arm_condbl as identical fixups.
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/external/llvm/lib/Target/BPF/MCTargetDesc/ |
BPFMCCodeEmitter.cpp | 44 SmallVectorImpl<MCFixup> &Fixups, 50 SmallVectorImpl<MCFixup> &Fixups, 54 SmallVectorImpl<MCFixup> &Fixups, 58 SmallVectorImpl<MCFixup> &Fixups, 77 SmallVectorImpl<MCFixup> &Fixups, 92 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_4)); 94 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8)); 97 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2)); 108 SmallVectorImpl<MCFixup> &Fixups, 115 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI) [all...] |
/external/llvm/include/llvm/MC/ |
MCCodeEmitter.h | 40 SmallVectorImpl<MCFixup> &Fixups,
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/external/llvm/lib/MC/ |
WinCOFFStreamer.cpp | 48 SmallVector<MCFixup, 4> Fixups; 51 getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI); 53 // Add the fixups and data. 54 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { 55 Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); 56 DF->getFixups().push_back(Fixups[i]);
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