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    Searched refs:GPR32RegClass (Results 1 - 17 of 17) sorted by null

  /external/llvm/lib/Target/Mips/
MipsMachineFunction.cpp 50 : &Mips::GPR32RegClass;
71 : &Mips::GPR32RegClass;
83 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
MipsOptionRecord.h 46 GPR32RegClass = &(TRI->getRegClass(Mips::GPR32RegClassID));
64 const MCRegisterClass *GPR32RegClass;
MipsFastISel.cpp 265 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);
284 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass);
298 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
335 unsigned TempReg = materialize32BitInt(Imm, &Mips::GPR32RegClass);
341 unsigned TempReg1 = materialize32BitInt(Imm >> 32, &Mips::GPR32RegClass);
343 materialize32BitInt(Imm & 0xFFFFFFFF, &Mips::GPR32RegClass);
354 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
376 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
596 unsigned TempReg = createResultReg(&Mips::GPR32RegClass);
602 unsigned TempReg = createResultReg(&Mips::GPR32RegClass);
    [all...]
MipsSERegisterInfo.cpp 60 return &Mips::GPR32RegClass;
183 ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
MipsSubtarget.cpp 135 &Mips::GPR64RegClass : &Mips::GPR32RegClass);
MipsSEFrameLowering.cpp 295 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
360 const TargetRegisterClass *RC2 = &Mips::GPR32RegClass;
398 &Mips::GPR64RegClass : &Mips::GPR32RegClass;
569 const TargetRegisterClass *PtrRC = &Mips::GPR32RegClass;
698 ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
733 const TargetRegisterClass *PtrRC = &Mips::GPR32RegClass;
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MipsSEInstrInfo.cpp 86 if (Mips::GPR32RegClass.contains(DestReg)) { // Copy to CPU Reg.
87 if (Mips::GPR32RegClass.contains(SrcReg)) {
114 else if (Mips::GPR32RegClass.contains(SrcReg)) { // Copy from CPU Reg.
189 if (Mips::GPR32RegClass.hasSubClassEq(RC))
262 if (Mips::GPR32RegClass.hasSubClassEq(RC))
459 &Mips::GPR64RegClass : &Mips::GPR32RegClass;
Mips16InstrInfo.cpp 68 Mips::GPR32RegClass.contains(SrcReg))
70 else if (Mips::GPR32RegClass.contains(DestReg) &&
MipsRegisterInfo.cpp 55 return ABI.ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
MipsAsmPrinter.cpp 257 unsigned CPURegSize = Mips::GPR32RegClass.getSize();
276 } else if (Mips::GPR32RegClass.contains(Reg))
    [all...]
MipsSEISelDAGToDAG.cpp 143 RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
    [all...]
MipsSEISelLowering.cpp 42 addRegisterClass(MVT::i32, &Mips::GPR32RegClass);
    [all...]
MipsISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsOptionRecord.cpp 79 if (GPR32RegClass->contains(CurrentSubReg) ||
  /external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 345 : &AArch64::GPR32RegClass;
378 &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
    [all...]
AArch64InstrInfo.cpp 492 } else if (MRI.constrainRegClass(DstReg, &AArch64::GPR32RegClass)) {
493 RC = &AArch64::GPR32RegClass;
    [all...]
AArch64ISelLowering.cpp     [all...]

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