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  /device/google/contexthub/firmware/inc/platform/stm32f4xx/cmsis/
core_cm0.h 533 #define _BIT_SHIFT(IRQn) ( (((uint32_t)(IRQn) ) & 0x03) * 8 )
534 #define _SHP_IDX(IRQn) ( ((((uint32_t)(IRQn) & 0x0F)-8) >> 2) )
535 #define _IP_IDX(IRQn) ( ((uint32_t)(IRQn) >> 2) )
542 \param [in] IRQn External interrupt number. Value cannot be negative.
544 __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
546 NVIC->ISER[0] = (1 << ((uint32_t)(IRQn) & 0x1F));
554 \param [in] IRQn External interrupt number. Value cannot be negative.
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core_cm0plus.h     [all...]
core_sc000.h     [all...]
core_cm3.h     [all...]
core_cm4.h     [all...]
core_sc300.h     [all...]
core_cm7.h     [all...]
  /device/google/contexthub/firmware/inc/platform/stm32f4xx/
spi.h 82 const enum IRQn spiRxIrq(uint8_t busId);
83 const enum IRQn spiTxIrq(uint8_t busId);
dma.h 60 const enum IRQn dmaIrq(uint8_t busId, uint8_t stream);
cmsis.h 30 typedef enum IRQn
  /device/google/contexthub/firmware/src/platform/stm32f4xx/
hostIntf.c 29 enum IRQn rx, tx;
dma.c 132 static const enum IRQn STM_DMA_IRQ[STM_DMA_NUM_DEVS][STM_DMA_NUM_STREAMS] = {
299 const enum IRQn dmaIrq(uint8_t busId, uint8_t stream)
spi.c 627 const enum IRQn spiRxIrq(uint8_t busId)
637 const enum IRQn spiTxIrq(uint8_t busId)

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