| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 657 EVT InnerVT = InnerOp.getValueType();
658 unsigned InnerBits = InnerVT.getSizeInBits();
660 isTypeDesirableForOp(ISD::SHL, InnerVT)) {
661 EVT ShTy = getShiftAmountTy(InnerVT, DL);
663 ShTy = InnerVT;
665 TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 272 for (MVT InnerVT : MVT::vector_valuetypes()) {
273 setTruncStoreAction(VT, InnerVT, Expand);
274 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand);
275 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand);
276 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 607 for (MVT InnerVT : MVT::vector_valuetypes()) {
608 setTruncStoreAction(VT, InnerVT, Expand);
609 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand);
610 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand);
611 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
678 for (MVT InnerVT : MVT::all_valuetypes())
679 setLoadExtAction(ISD::EXTLOAD, InnerVT, VT.getSimpleVT(), Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 445 for (MVT InnerVT : MVT::vector_valuetypes()) {
446 setTruncStoreAction(VT, InnerVT, Expand);
447 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand);
448 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand);
449 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 490 for (MVT InnerVT : MVT::vector_valuetypes()) {
491 setTruncStoreAction(VT, InnerVT, Expand);
492 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand);
493 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand);
494 setLoadExtAction(ISD::EXTLOAD, VT, InnerVT, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
