/external/clang/test/CodeGenCXX/ |
2010-03-09-AnonAggregate.cpp | 6 class MO { 12 class MO m;
|
/external/llvm/lib/Target/MSP430/ |
MSP430MCInstLower.cpp | 32 GetGlobalAddressSymbol(const MachineOperand &MO) const { 33 switch (MO.getTargetFlags()) { 38 return Printer.getSymbol(MO.getGlobal()); 42 GetExternalSymbolSymbol(const MachineOperand &MO) const { 43 switch (MO.getTargetFlags()) { 48 return Printer.GetExternalSymbolSymbol(MO.getSymbolName()); 52 GetJumpTableSymbol(const MachineOperand &MO) const { 57 << MO.getIndex(); 59 switch (MO.getTargetFlags()) { 69 GetConstantPoolIndexSymbol(const MachineOperand &MO) const [all...] |
MSP430MCInstLower.h | 36 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const; 38 MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const; 39 MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const; 40 MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const; 41 MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const; 42 MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
|
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyMCInstLower.cpp | 31 WebAssemblyMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { 32 return Printer.getSymbol(MO.getGlobal()); 36 const MachineOperand &MO) const { 37 return Printer.GetExternalSymbolSymbol(MO.getSymbolName()); 40 MCOperand WebAssemblyMCInstLower::LowerSymbolOperand(const MachineOperand &MO, 42 assert(MO.getTargetFlags() == 0 && "WebAssembly does not use target flags"); 46 int64_t Offset = MO.getOffset(); 48 assert(!MO.isJTI() && "Unexpected offset with jump table index"); 61 const MachineOperand &MO = MI->getOperand(i); 64 switch (MO.getType()) [all...] |
WebAssemblyMCInstLower.h | 34 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const; 35 MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const; 36 MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
|
/external/llvm/lib/Target/AArch64/ |
AArch64MCInstLower.cpp | 35 AArch64MCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { 36 return Printer.getSymbol(MO.getGlobal()); 40 AArch64MCInstLower::GetExternalSymbolSymbol(const MachineOperand &MO) const { 41 return Printer.GetExternalSymbolSymbol(MO.getSymbolName()); 44 MCOperand AArch64MCInstLower::lowerSymbolOperandDarwin(const MachineOperand &MO, 49 if ((MO.getTargetFlags() & AArch64II::MO_GOT) != 0) { 50 if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE) 52 else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == 57 } else if ((MO.getTargetFlags() & AArch64II::MO_TLS) != 0) { 58 if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE [all...] |
AArch64MCInstLower.h | 38 bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const; 41 MCOperand lowerSymbolOperandDarwin(const MachineOperand &MO, 43 MCOperand lowerSymbolOperandELF(const MachineOperand &MO, 45 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const; 47 MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const; 48 MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
|
AArch64DeadRegisterDefinitionsPass.cpp | 66 for (const MachineOperand &MO : MI.implicit_operands()) 67 if (MO.isReg() && MO.isDef()) 68 if (TRI->regsOverlap(Reg, MO.getReg())) 92 MachineOperand &MO = MI.getOperand(i); 93 if (MO.isReg() && MO.isDead() && MO.isDef()) { 94 assert(!MO.isImplicit() && "Unexpected implicit def!"); 104 if (implicitlyDefinesOverlappingReg(MO.getReg(), MI)) [all...] |
/external/llvm/lib/Target/BPF/ |
BPFMCInstLower.cpp | 29 BPFMCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const { 30 return Printer.getSymbol(MO.getGlobal()); 33 MCOperand BPFMCInstLower::LowerSymbolOperand(const MachineOperand &MO, 38 if (!MO.isJTI() && MO.getOffset()) 48 const MachineOperand &MO = MI->getOperand(i); 51 switch (MO.getType()) { 57 if (MO.isImplicit()) 59 MCOp = MCOperand::createReg(MO.getReg()); 62 MCOp = MCOperand::createImm(MO.getImm()) [all...] |
BPFAsmPrinter.cpp | 51 const MachineOperand &MO = MI->getOperand(OpNum); 53 switch (MO.getType()) { 55 O << BPFInstPrinter::getRegisterName(MO.getReg()); 59 O << MO.getImm(); 63 O << *MO.getMBB()->getSymbol(); 67 O << *getSymbol(MO.getGlobal());
|
/external/llvm/lib/Target/Sparc/ |
SparcMCInstLower.cpp | 32 const MachineOperand &MO, 36 (SparcMCExpr::VariantKind)MO.getTargetFlags(); 39 switch(MO.getType()) { 42 Symbol = MO.getMBB()->getSymbol(); 46 Symbol = AP.getSymbol(MO.getGlobal()); 50 Symbol = AP.GetBlockAddressSymbol(MO.getBlockAddress()); 54 Symbol = AP.GetExternalSymbolSymbol(MO.getSymbolName()); 58 Symbol = AP.GetCPISymbol(MO.getIndex()); 70 const MachineOperand &MO, 72 switch(MO.getType()) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZMCInstLower.cpp | 37 SystemZMCInstLower::getExpr(const MachineOperand &MO, 41 switch (MO.getType()) { 43 Symbol = MO.getMBB()->getSymbol(); 48 Symbol = AsmPrinter.getSymbol(MO.getGlobal()); 52 Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName()); 56 Symbol = AsmPrinter.GetJTISymbol(MO.getIndex()); 61 Symbol = AsmPrinter.GetCPISymbol(MO.getIndex()); 65 Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()); 73 if (int64_t Offset = MO.getOffset()) { 80 MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const [all...] |
SystemZMCInstLower.h | 35 // Return an MCOperand for MO. 36 MCOperand lowerOperand(const MachineOperand& MO) const; 38 // Return an MCExpr for symbolic operand MO with variant kind Kind. 39 const MCExpr *getExpr(const MachineOperand &MO,
|
/external/llvm/lib/Target/XCore/ |
XCoreMCInstLower.cpp | 35 MCOperand XCoreMCInstLower::LowerSymbolOperand(const MachineOperand &MO, 43 Symbol = MO.getMBB()->getSymbol(); 46 Symbol = Printer.getSymbol(MO.getGlobal()); 47 Offset += MO.getOffset(); 50 Symbol = Printer.GetBlockAddressSymbol(MO.getBlockAddress()); 51 Offset += MO.getOffset(); 54 Symbol = Printer.GetExternalSymbolSymbol(MO.getSymbolName()); 55 Offset += MO.getOffset(); 58 Symbol = Printer.GetJTISymbol(MO.getIndex()); 61 Symbol = Printer.GetCPISymbol(MO.getIndex()) [all...] |
/external/llvm/lib/Target/ARM/ |
ARMMCInstLower.cpp | 27 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO, 30 unsigned Option = MO.getTargetFlags() & ARMII::MO_OPTION_MASK; 59 if (!MO.isJTI() && MO.getOffset()) 61 MCConstantExpr::create(MO.getOffset(), 68 bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO, 70 switch (MO.getType()) { 74 if (MO.isImplicit() && MO.getReg() != ARM::CPSR) 76 assert(!MO.getSubReg() && "Subregs should be eliminated!") [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCMCInstLower.cpp | 38 static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO, AsmPrinter &AP){ 47 if (MO.getTargetFlags() == PPCII::MO_PLT_OR_STUB) { 50 } else if (MO.getTargetFlags() & PPCII::MO_NLP_FLAG) 58 if (!MO.isGlobal()) { 59 assert(MO.isSymbol() && "Isn't a symbol reference"); 60 Mangler::getNameWithPrefix(Name, MO.getSymbolName(), DL); 62 const GlobalValue *GV = MO.getGlobal(); 74 if (MO.getTargetFlags() == PPCII::MO_PLT_OR_STUB && isDarwin) { 80 if (MO.isGlobal()) { 83 StubValueTy(AP.getSymbol(MO.getGlobal()) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonMCInstLower.cpp | 34 static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol, 42 switch (MO.getTargetFlags()) { 65 if (!MO.isJTI() && MO.getOffset()) 66 ME = MCBinaryExpr::createAdd(ME, MCConstantExpr::create(MO.getOffset(), MC), 90 const MachineOperand &MO = MI->getOperand(i); 92 if (MO.getTargetFlags() & HexagonII::HMOTF_ConstExtended) 95 switch (MO.getType()) { 101 if (MO.isImplicit()) continue; 102 MCO = MCOperand::createReg(MO.getReg()) [all...] |
/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64MCCodeEmitter.cpp | 54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 204 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, 207 if (MO.isReg()) 208 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); 210 assert(MO.isImm() && "did not expect relocated expression"); 211 return static_cast<unsigned>(MO.getImm()); 218 const MCOperand &MO = MI.getOperand(OpIdx); 221 if (MO.isImm()) 222 ImmVal = static_cast<uint32_t>(MO.getImm()); 224 assert(MO.isExpr() && "unable to encode load/store imm operand") [all...] |
/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
PPCMCCodeEmitter.cpp | 93 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO, 156 const MCOperand &MO = MI.getOperand(OpNo); 157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); 160 Fixups.push_back(MCFixup::create(0, MO.getExpr(), 168 const MCOperand &MO = MI.getOperand(OpNo); 169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI) [all...] |
/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
SparcMCCodeEmitter.cpp | 56 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 104 const MCOperand &MO = MI.getOperand(tlsOpNo); 105 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); 115 getMachineOpValue(const MCInst &MI, const MCOperand &MO, 119 if (MO.isReg()) 120 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); 122 if (MO.isImm()) 123 return MO.getImm(); 125 assert(MO.isExpr()); 126 const MCExpr *Expr = MO.getExpr() [all...] |
/external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
WebAssemblyMCCodeEmitter.cpp | 48 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 69 const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups, 71 if (MO.isReg()) 72 return MRI.getEncodingValue(MO.getReg()); 73 if (MO.isImm()) 74 return static_cast<unsigned>(MO.getImm()); 76 assert(MO.isExpr()); 78 assert(MO.getExpr()->getKind() == MCExpr::SymbolRef);
|
/external/llvm/lib/CodeGen/ |
MachineInstr.cpp | 263 hash_code llvm::hash_value(const MachineOperand &MO) { 264 switch (MO.getType()) { 267 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef()); 269 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getImm()); 271 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCImm()) [all...] |
MachineRegisterInfo.cpp | 74 for (MachineOperand &MO : reg_nodbg_operands(Reg)) { 76 MachineInstr *MI = MO.getParent(); 77 unsigned OpNo = &MO - &MI->getOperand(0); 126 MachineOperand *MO = &M; 127 MachineInstr *MI = MO->getParent(); 130 << " use list MachineOperand " << MO 137 if (!(MO >= MO0 && MO < MO0+NumOps)) { 139 << " use list MachineOperand " << MO 143 if (!MO->isReg()) [all...] |
MachineInstrBundle.cpp | 61 MachineOperand &MO = MII->getOperand(i); 62 if (MO.isReg() && MO.isInternalRead()) 63 MO.setIsInternalRead(false); 137 MachineOperand &MO = FirstMI->getOperand(i); 138 if (!MO.isReg()) 140 if (MO.isDef()) { 141 Defs.push_back(&MO); 145 unsigned Reg = MO.getReg(); 150 MO.setIsInternalRead() [all...] |
RegAllocFast.cpp | 216 /// isLastUseOfLocalReg - Return true if MO is the only remaining reference to 219 bool RAFast::isLastUseOfLocalReg(MachineOperand &MO) { 222 if (StackSlotForVirtReg[MO.getReg()] != -1) 225 // Check that the use/def chain has exactly one operand - MO. 226 MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(MO.getReg()); 227 if (&*I != &MO) 235 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum); 236 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { 237 if (MO.getReg() == LR.PhysReg) 238 MO.setIsKill() [all...] |