| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.cpp | 1 //===- NVPTXRegisterInfo.cpp - NVPTX Register Information -----------------===//
10 // This file contains the NVPTX implementation of the TargetRegisterInfo class.
15 #include "NVPTX.h"
26 #define DEBUG_TYPE "nvptx-reg-info"
30 if (RC == &NVPTX::Float32RegsRegClass) {
33 if (RC == &NVPTX::Float64RegsRegClass) {
35 } else if (RC == &NVPTX::Int64RegsRegClass) {
37 } else if (RC == &NVPTX::Int32RegsRegClass) {
39 } else if (RC == &NVPTX::Int16RegsRegClass) {
41 } else if (RC == &NVPTX::Int1RegsRegClass)
[all...] |
| NVPTXInstrInfo.cpp | 1 //===- NVPTXInstrInfo.cpp - NVPTX Instruction Information -----------------===//
10 // This file contains the NVPTX implementation of the TargetInstrInfo class.
14 #include "NVPTX.h"
44 if (DestRC == &NVPTX::Int1RegsRegClass) {
45 Op = NVPTX::IMOV1rr;
46 } else if (DestRC == &NVPTX::Int16RegsRegClass) {
47 Op = NVPTX::IMOV16rr;
48 } else if (DestRC == &NVPTX::Int32RegsRegClass) {
49 Op = (SrcRC == &NVPTX::Int32RegsRegClass ? NVPTX::IMOV32r
[all...] |
| NVPTXISelDAGToDAG.cpp | 1 //===-- NVPTXISelDAGToDAG.cpp - A dag to dag inst selector for NVPTX ------===//
10 // This file defines an instruction selector for the NVPTX target.
27 #define DEBUG_TYPE "nvptx-isel"
30 "nvptx-prec-divf32", cl::ZeroOrMore, cl::Hidden,
31 cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use"
36 UsePrecSqrtF32("nvptx-prec-sqrtf32", cl::Hidden,
37 cl::desc("NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn."),
41 FtzEnabled("nvptx-f32ftz", cl::ZeroOrMore, cl::Hidden,
42 cl::desc("NVPTX Specific: Flush f32 subnormals to sign-preserving zero."),
47 /// NVPTX-specific DAG, ready for instruction scheduling
[all...] |
| NVPTXFrameLowering.cpp | 1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
10 // This file contains the NVPTX implementation of TargetFrameLowering class.
15 #include "NVPTX.h"
52 (Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes);
54 (Is64Bit ? NVPTX::MOV_DEPOT_ADDR_64 : NVPTX::MOV_DEPOT_ADDR);
55 if (!MR.use_empty(NVPTX::VRFrame)) {
59 NVPTX::VRFrame)
60 .addReg(NVPTX::VRFrameLocal)
[all...] |
| NVPTXPeephole.cpp | 1 //===-- NVPTXPeephole.cpp - NVPTX Peephole Optimiztions -------------------===//
10 // In NVPTX, NVPTXFrameLowering will emit following instruction at the beginning
35 #include "NVPTX.h"
44 #define DEBUG_TYPE "nvptx-peephole"
61 return "NVPTX optimize redundant cvta.to.local instruction";
72 INITIALIZE_PASS(NVPTXPeephole, "nvptx-peephole", "NVPTX Peephole", false, false)
78 if (Root.getOpcode() != NVPTX::cvta_to_local_yes_64 &&
79 Root.getOpcode() != NVPTX::cvta_to_local_yes)
91 (GenericAddrDef->getOpcode() != NVPTX::LEA_ADDRi64 &
[all...] |
| Makefile | 1 ##===- lib/Target/NVPTX/Makefile ---------------------------*- Makefile -*-===##
12 TARGET = NVPTX
|
| NVPTXTargetMachine.h | 1 //===-- NVPTXTargetMachine.h - Define TargetMachine for NVPTX ---*- C++ -*-===//
10 // This file declares the NVPTX specific subclass of TargetMachine.
30 NVPTX::DrvInterface drvInterface;
48 NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
|
| NVPTXReplaceImageHandles.cpp | 16 #include "NVPTX.h"
40 return "NVPTX Replace Image Handles";
143 case NVPTX::LD_i64_avar: {
148 if (TM.getDrvInterface() == NVPTX::CUDA) {
167 case NVPTX::texsurf_handles: {
176 case NVPTX::nvvm_move_i64:
|
| NVPTXSubtarget.cpp | 1 //===- NVPTXSubtarget.cpp - NVPTX Subtarget Information -------------------===//
10 // This file implements the NVPTX specific subclass of TargetSubtarget.
19 #define DEBUG_TYPE "nvptx-subtarget"
56 if (TM.getDrvInterface() == NVPTX::CUDA)
|
| NVPTXAsmPrinter.cpp | 1 //===-- NVPTXAsmPrinter.cpp - NVPTX LLVM assembly writer ------------------===//
11 // of machine-dependent LLVM code to NVPTX assembly language.
18 #include "NVPTX.h"
57 EmitLineNumbers("nvptx-emit-line-numbers", cl::Hidden,
58 cl::desc("NVPTX Specific: Emit Line numbers even without -G"),
62 InterleaveSrc("nvptx-emit-src", cl::ZeroOrMore, cl::Hidden,
63 cl::desc("NVPTX Specific: Emit source line in ptx file"),
161 if (static_cast<NVPTXTargetMachine &>(TM).getDrvInterface() == NVPTX::CUDA)
235 if (MI->getOpcode() == NVPTX::CALL_PROTOTYPE) {
309 if (RC == &NVPTX::Int1RegsRegClass)
[all...] |
| NVPTXLowerKernelArgs.cpp | 51 // address space. As #2, it allows NVPTX to emit more ld/st.global. E.g.,
84 #include "NVPTX.h"
127 INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args",
128 "Lower kernel arguments (NVPTX)", false, false)
200 if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
224 else if (TM && TM->getDrvInterface() == NVPTX::CUDA)
|
| NVPTX.h | 1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
11 // the LLVM NVPTX back-end.
63 namespace NVPTX {
170 // Defines symbolic names for NVPTX registers. This defines a mapping from
175 // Defines symbolic names for the NVPTX instructions.
|
| NVPTXTargetMachine.cpp | 1 //===-- NVPTXTargetMachine.cpp - Define TargetMachine for NVPTX -----------===//
10 // Top-level implementation for the NVPTX target.
16 #include "NVPTX.h"
67 // but it's very NVPTX-specific.
100 drvInterface = NVPTX::NVCL;
102 drvInterface = NVPTX::CUDA;
255 assert(!RegAllocPass && "NVPTX uses no regalloc!");
261 assert(!RegAllocPass && "NVPTX uses no regalloc!");
|
| NVPTXAsmPrinter.h | 1 //===-- NVPTXAsmPrinter.h - NVPTX LLVM assembly writer --------------------===//
11 // of machine-dependent LLVM code to NVPTX assembly language.
18 #include "NVPTX.h"
198 const char *getPassName() const override { return "NVPTX Assembly Printer"; }
315 NVPTX::CUDA) {
|
| NVPTXISelLowering.cpp | 9 // This file defines the interfaces that NVPTX uses to lower LLVM code into a
15 #include "NVPTX.h"
41 #define DEBUG_TYPE "nvptx-lower"
48 "nvptx-sched4reg",
49 cl::desc("NVPTX Specific: schedule for register pressue"), cl::init(false));
52 FMAContractLevelOpt("nvptx-fma-level", cl::ZeroOrMore, cl::Hidden,
53 cl::desc("NVPTX Specific: FMA contraction (0: don't do it"
137 addRegisterClass(MVT::i1, &NVPTX::Int1RegsRegClass);
138 addRegisterClass(MVT::i16, &NVPTX::Int16RegsRegClass);
139 addRegisterClass(MVT::i32, &NVPTX::Int32RegsRegClass)
[all...] |
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.cpp | 16 #include "NVPTX.h"
99 if (Imm & NVPTX::PTXCvtMode::FTZ_FLAG)
103 if (Imm & NVPTX::PTXCvtMode::SAT_FLAG)
107 switch (Imm & NVPTX::PTXCvtMode::BASE_MASK) {
110 case NVPTX::PTXCvtMode::NONE:
112 case NVPTX::PTXCvtMode::RNI:
115 case NVPTX::PTXCvtMode::RZI:
118 case NVPTX::PTXCvtMode::RMI:
121 case NVPTX::PTXCvtMode::RPI:
124 case NVPTX::PTXCvtMode::RN
[all...] |
| /external/clang/include/clang/Basic/ |
| TargetBuiltins.h | 66 /// \brief NVPTX builtins
67 namespace NVPTX {
|
| /external/clang/lib/CodeGen/ |
| CGBuiltin.cpp | [all...] |
| /external/clang/lib/Basic/ |
| Targets.cpp | [all...] |
| /external/llvm/ |
| configure | [all...] |
