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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
arm-idiv-bad.d 1 #name: Invalid V7 ARM DIV instructions
  /external/llvm/test/MC/ARM/
directive-arch_extension-crc.s 2 @ RUN: | FileCheck %s -check-prefix CHECK-V7
11 @ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture
12 @ CHECK-V7-NEXT: .arch_extension crc
13 @ CHECK-V7-NEXT: ^
18 @ CHECK-V7: error: instruction requires: crc armv8
20 @ CHECK-V7: error: instruction requires: crc armv8
22 @ CHECK-V7: error: instruction requires: crc armv8
25 @ CHECK-V7: error: instruction requires: crc armv8
27 @ CHECK-V7: error: instruction requires: crc armv8
29 @ CHECK-V7: error: instruction requires: crc armv
    [all...]
directive-arch_extension-crypto.s 2 @ RUN: | FileCheck %s -check-prefix CHECK-V7
6 @ RUN: | FileCheck %s -check-prefix CHECK-V7
13 @ CHECK-V7: error: architectural extension 'crypto' is not allowed for the current base architecture
14 @ CHECK-V7-NEXT: .arch_extension crypto
15 @ CHECK-V7-NEXT: ^
20 @ CHECK-V7: error: instruction requires: crypto armv8
23 @ CHECK-V7: error: instruction requires: crypto armv8
25 @ CHECK-V7: error: instruction requires: crypto armv8
27 @ CHECK-V7: error: instruction requires: crypto armv8
29 @ CHECK-V7: error: instruction requires: crypto armv
    [all...]
basic-arm-instructions-v8.s 4 @ RUN: not llvm-mc -triple armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
11 @ CHECK-V7: error: instruction requires: armv8
12 @ CHECK-V7: error: instruction requires: armv8
17 @ CHECK-V7: error: instruction requires: armv8
31 @ CHECK-V7: error: invalid operand for instruction
32 @ CHECK-V7: error: invalid operand for instruction
33 @ CHECK-V7: error: invalid operand for instruction
34 @ CHECK-V7: error: invalid operand for instruction
48 @ CHECK-V7: error: invalid operand for instruction
49 @ CHECK-V7: error: invalid operand for instructio
    [all...]
basic-thumb2-instructions-v8.s 4 @ RUN: not llvm-mc -triple thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
11 @ CHECK-V7: error: instruction requires: armv8
12 @ CHECK-V7: error: instruction requires: armv8
20 @ CHECK-V7: error: instruction requires: armv8
25 @ CHECK-V7: error: instruction requires: armv8
34 @ CHECK-V7: error: instruction variant requires ARMv8 or later
35 @ CHECK-V7: error: instruction variant requires ARMv8 or later
36 @ CHECK-V7: error: invalid operand for instruction
45 @ CHECK-V7: error: instruction requires: armv8
46 @ CHECK-V7: error: instruction requires: armv
    [all...]
neon-crypto.s 2 @ RUN: not llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
12 @ CHECK-V7: instruction requires: crypto armv8
13 @ CHECK-V7: instruction requires: crypto armv8
14 @ CHECK-V7: instruction requires: crypto armv8
15 @ CHECK-V7: instruction requires: crypto armv8
23 @ CHECK-V7: instruction requires: crypto armv8
24 @ CHECK-V7: instruction requires: crypto armv8
25 @ CHECK-V7: instruction requires: crypto armv8
41 @ CHECK-V7: instruction requires: crypto armv8
42 @ CHECK-V7: instruction requires: crypto armv
    [all...]
load-store-acquire-release-v8-thumb.s 2 @ RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
12 @ CHECK-V7: error: instruction requires: armv8
13 @ CHECK-V7: error: instruction requires: armv8
14 @ CHECK-V7: error: instruction requires: armv8
15 @ CHECK-V7: error: instruction requires: armv8
25 @ CHECK-V7: error: instruction requires: armv8
26 @ CHECK-V7: error: instruction requires: armv8
27 @ CHECK-V7: error: instruction requires: armv8
28 @ CHECK-V7: error: instruction requires: armv8
36 @ CHECK-V7: error: instruction requires: armv
    [all...]
load-store-acquire-release-v8.s 2 @ RUN: not llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
12 @ CHECK-V7: instruction requires: armv8
13 @ CHECK-V7: instruction requires: armv8
14 @ CHECK-V7: instruction requires: armv8
15 @ CHECK-V7: instruction requires: armv8
25 @ CHECK-V7: instruction requires: armv8
26 @ CHECK-V7: instruction requires: armv8
27 @ CHECK-V7: instruction requires: armv8
28 @ CHECK-V7: instruction requires: armv8
36 @ CHECK-V7: instruction requires: armv
    [all...]
directive-arch_extension-simd.s 2 @ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
6 @ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
13 @ CHECK-V7: error: architectural extension 'simd' is not allowed for the current base architecture
14 @ CHECK-V7-NEXT: .arch_extension simd
15 @ CHECK-V7-NEXT: ^
20 @ CHECK-V7: error: instruction requires: FPARMv8
22 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
30 @ CHECK-V7: error: instruction requires: FPARMv
    [all...]
directive-arch_extension-fp.s 2 @ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
6 @ RUN: | FileCheck %s -check-prefix CHECK-V7 -check-prefix CHECK
13 @ CHECK-V7: error: architectural extension 'fp' is not allowed for the current base architecture
14 @ CHECK-V7-NEXT: .arch_extension fp
15 @ CHECK-V7-NEXT: ^
20 @ CHECK-V7: error: instruction requires: FPARMv8
23 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
29 @ CHECK-V7: error: instruction requires: FPARMv
    [all...]
directive-arch_extension-sec.s 4 @ RUN: | FileCheck %s -check-prefix CHECK-V7
6 @ RUN: | FileCheck %s -check-prefix CHECK-V7
10 @ RUN: | FileCheck %s -check-prefix CHECK-V7
18 @ CHECK-V7-NOT: error: architectural extension 'sec' is not allowed for the current base architecture
29 @ CHECK-V7-NOT: error: architectural extension 'sec' is not allowed for the current base architecture
34 @ CHECK-V7: error: instruction requires: TrustZone
35 @ CHECK-V7-NOT: error: instruction requires: TrustZone
crc32-thumb.s 2 @ RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
11 @ CHECK-V7: error: instruction requires: crc armv8
12 @ CHECK-V7: error: instruction requires: crc armv8
13 @ CHECK-V7: error: instruction requires: crc armv8
25 @ CHECK-V7: error: instruction requires: crc armv8
26 @ CHECK-V7: error: instruction requires: crc armv8
27 @ CHECK-V7: error: instruction requires: crc armv8
crc32.s 2 @ RUN: not llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
11 @ CHECK-V7: error: instruction requires: crc armv8
12 @ CHECK-V7: error: instruction requires: crc armv8
13 @ CHECK-V7: error: instruction requires: crc armv8
25 @ CHECK-V7: error: instruction requires: crc armv8
26 @ CHECK-V7: error: instruction requires: crc armv8
27 @ CHECK-V7: error: instruction requires: crc armv8
directive-arch_extension-mp.s 4 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7
10 @ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7
36 @ CHECK-V7: error: instruction requires: mp-extensions
diagnostics.s 2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V7 < %t %s
152 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
187 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
399 @ CHECK-ERRORS-V7: error: coprocessor option must be an immediate in range [0, 255]
400 @ CHECK-ERRORS-V7: ldc2 p2, c8, [r1], { 256 }
401 @ CHECK-ERRORS-V7: ^
403 @ CHECK-ERRORS-V7: error: coprocessor option must be an immediate in range [0, 255]
404 @ CHECK-ERRORS-V7: ldc2 p2, c8, [r1], { -1 }
405 @ CHECK-ERRORS-V7: ^
477 @ CHECK-ERRORS-V7: error: instruction requires: FPARMv
    [all...]
invalid-fp-armv8.s 6 @ V7-NOT: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
8 @ V7-NOT: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
directive-arch_extension-idiv.s 4 @ RUN: | FileCheck %s -check-prefix CHECK-ARMv7 -check-prefix CHECK-V7
10 @ RUN: | FileCheck %s -check-prefix CHECK-THUMBv7 -check-prefix CHECK-V7
thumb2-diagnostics.s 2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS --check-prefix=CHECK-ERRORS-V7 < %t %s
47 @ CHECK-ERRORS-V7: error: immediate operand must be in the range [0,15]
  /prebuilts/go/darwin-x86/test/fixedbugs/
bug473.go 32 var V7 = F(5)
34 var V8 = F(V14, V7, V3, V6, V5)
61 expect("V7", V7, 5)
  /prebuilts/go/linux-x86/test/fixedbugs/
bug473.go 32 var V7 = F(5)
34 var V8 = F(V14, V7, V3, V6, V5)
61 expect("V7", V7, 5)
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
neon-fp-cvt-int.s 28 \op V7.\()\reg_shape, V7.\()\reg_shape
37 \op V7.2S, V7.2S, #\fbits
40 \op V7.4S, V7.4S, #\fbits
44 \op V7.2D, V7.2D, #\fbits
advsisd-copy.s 23 \op \type\()31, V7.\type[\index]
fp_cvt_int.s 56 FMOV X7, V7.D[1]
57 FMOV V7.D[1], X7
  /frameworks/compile/mclinker/lib/Target/ARM/
ARMELFAttributeData.cpp 514 /* old\new ARM v6T2 ARM v6K ARM v7 ARM v6-M ARM v6S-M ARM v7E-M ARMv8, ARM v4t + v6-M */ // NOLINT
515 /* Pre v4 */ { CPU(V6T2), CPU(V6K), CPU(V7), -1, -1, -1, -1, -1 }, // NOLINT
516 /* ARM v4 */ { CPU(V6T2), CPU(V6K), CPU(V7), -1, -1, -1, -1, -1 }, // NOLINT
517 /* ARM v4T */ { CPU(V6T2), CPU(V6K), CPU(V7), CPU(V6K), CPU(V6K), CPU(V7E_M), CPU(V8), CPU(V4T) }, // NOLINT
518 /* ARM v5T */ { CPU(V6T2), CPU(V6K), CPU(V7), CPU(V6K), CPU(V6K), CPU(V7E_M), CPU(V8), CPU(V5T) }, // NOLINT
519 /* ARM v5TE */ { CPU(V6T2), CPU(V6K), CPU(V7), CPU(V6K), CPU(V6K), CPU(V7E_M), CPU(V8), CPU(V5TE) }, // NOLINT
520 /* ARM v5TEJ */ { CPU(V6T2), CPU(V6K), CPU(V7), CPU(V6K), CPU(V6K), CPU(V7E_M), CPU(V8), CPU(V5TEJ) }, // NOLINT
521 /* ARM v6 */ { CPU(V6T2), CPU(V6K), CPU(V7), CPU(V6K), CPU(V6K), CPU(V7E_M), CPU(V8), CPU(V6) }, // NOLINT
522 /* ARM v6KZ */ { CPU(V7), CPU(V6KZ), CPU(V7), CPU(V6KZ), CPU(V6KZ), CPU(V7E_M), CPU(V8), CPU(V6KZ) }, // NOLIN
    [all...]
  /external/llvm/unittests/Support/
AlignOfTest.cpp 74 struct V7 : virtual V2, virtual V6 {
75 ~V7() override;
77 struct V8 : V5, virtual V6, V7 { double zz;
89 V7::~V7() {}
135 [AlignOf<V7>::Alignment > 0]
175 EXPECT_LE(alignOf<V1>(), alignOf<V7>());
253 EXPECT_EQ(alignOf<V7>(), alignOf<AlignedCharArrayUnion<V7> >());
318 EXPECT_EQ(sizeof(V7), sizeof(AlignedCharArrayUnion<V7>))
    [all...]

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