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    Searched refs:VGPR (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Target/AMDGPU/
SIMachineFunctionInfo.h 107 unsigned VGPR;
109 SpilledReg(unsigned R, int L) : VGPR (R), Lane (L) { }
110 SpilledReg() : VGPR(0), Lane(-1) { }
SIMachineFunctionInfo.cpp 169 Spill.VGPR = LaneVGPRs[LaneVGPRIdx];
SIRegisterInfo.cpp 117 // TODO: May need to reserve a VGPR if doing LDS spilling.
285 if (Spill.VGPR == AMDGPU::NoRegister) {
292 Spill.VGPR)
318 if (Spill.VGPR == AMDGPU::NoRegister) {
326 .addReg(Spill.VGPR)
351 // VGPR register spill
  /external/mesa3d/src/gallium/drivers/radeon/
SIGenRegisterInfo.pl 134 my @VGPR;
136 print "def VGPR$i : VGPR_32 <$i, \"VGPR$i\">;\n";
137 $VGPR[$i] = "VGPR$i";
147 (add (sequence "VGPR%u", 0, $VGPR_MAX_IDX),
221 for (my $i = 0; $i <= $#VGPR; $i++) {
222 push (@{$hw_values{$i}}, $VGPR[$i]);
254 return print_reg_class('VReg', 'VGPR', $reg_width, $VGPR_COUNT, $sub_reg_ref, @types);

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