/art/runtime/arch/arm64/ |
registers_arm64.h | 49 X22 = 22,
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quick_method_frame_info_arm64.h | 36 (1 << art::arm64::X20) | (1 << art::arm64::X21) | (1 << art::arm64::X22) |
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/art/compiler/jni/quick/arm64/ |
calling_convention_arm64.cc | 188 return 1 << X19 | 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 |
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 384 // X21/X22 pair = 0x00000002, 394 else if (Reg1 == AArch64::X21 && Reg2 == AArch64::X22 &&
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/external/llvm/lib/Target/AArch64/Utils/ |
AArch64BaseInfo.h | 54 case AArch64::X22: return AArch64::W22; 94 case AArch64::W22: return AArch64::X22; [all...] |
/external/guava/guava-tests/benchmark/com/google/common/base/ |
EnumsBenchmark.java | 80 X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37, 89 X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, X32, X33, X34, X35, X36, X37, X38, X39,
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
PPCDisassembler.cpp | 191 PPC::X20, PPC::X21, PPC::X22, PPC::X23,
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
PPCAsmParser.cpp | 63 PPC::X20, PPC::X21, PPC::X22, PPC::X23, 74 PPC::X20, PPC::X21, PPC::X22, PPC::X23, [all...] |
/art/compiler/utils/arm64/ |
managed_register_arm64_test.cc | 616 EXPECT_TRUE(vixl::x22.Is(Arm64Assembler::reg_x(X22))); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 211 {PPC::X22, -80}, [all...] |
/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | 373 AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ddk/ |
scsi.h | 433 #define SCSIMESS_ORDERED_QUEUE_TAG 0X22 490 #define SCSISTAT_COMMAND_TERMINATED 0x22 [all...] |
/external/valgrind/memcheck/ |
mc_machine.c | [all...] |