/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | [all...] |
LegalizeDAG.cpp | 547 // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD. 549 HiExtType = ISD::ZEXTLOAD; 554 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(), 572 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, [all...] |
SelectionDAGDumper.cpp | 503 case ISD::ZEXTLOAD: OS << ", zext"; break;
|
LegalizeVectorOps.cpp | 602 case ISD::ZEXTLOAD: [all...] |
LegalizeIntegerTypes.cpp | [all...] |
TargetLowering.cpp | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 144 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); 145 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i8, Legal); 146 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i16, Legal); 147 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i32, Expand); 560 ISD::LoadExtType ExtTy = Signed ? ISD::SEXTLOAD : ISD::ZEXTLOAD; [all...] |
R600ISelLowering.cpp | 131 // EXTLOAD should be the same as ZEXTLOAD. It is legal for some address 138 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); 139 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i8, Custom); 140 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i16, Custom); [all...] |
AMDGPUISelLowering.cpp | 187 setLoadExtAction(ISD::ZEXTLOAD, MVT::i64, VT, Expand); 193 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i8, Expand); 196 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v4i8, Expand); 199 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v2i16, Expand); 202 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v4i16, Expand); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 130 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); 134 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i16, Expand); 465 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, [all...] |
/external/llvm/lib/Target/BPF/ |
BPFISelLowering.cpp | 152 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 186 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD})
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/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 241 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); 419 setLoadExtAction(ISD::ZEXTLOAD, MVT::i64, MVT::i32, Custom); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 242 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); 275 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 231 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 83 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
HexagonISelDAGToDAG.cpp | 381 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); [all...] |
/external/llvm/lib/CodeGen/ |
CodeGenPrepare.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 125 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote); 493 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 610 setLoadExtAction(ISD::ZEXTLOAD, VT, InnerVT, Expand); [all...] |