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  /external/cblas/src/
cblas_sspr2.c 3 * cblas_sspr2.c
12 void cblas_sspr2(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, function
41 cblas_xerbla(2, "cblas_sspr2","Illegal Uplo setting, %d\n",Uplo );
59 cblas_xerbla(2, "cblas_sspr2","Illegal Uplo setting, %d\n",Uplo );
68 } else cblas_xerbla(1, "cblas_sspr2", "Illegal Order setting, %d\n", order);
Makefile 110 cblas_sspr.o cblas_sspr2.o cblas_ssymv.o cblas_ssyr.o cblas_ssyr2.o \
  /frameworks/rs/cpu_ref/
rsCpuBLAS.inc 67 RS_APPLY_MACRO_TO(cblas_sspr2)
rsCpuIntrinsicBLAS.cpp 348 cblas_sspr2(CblasRowMajor, Uplo, call->N, call->alpha.f, (float*)X, call->incX,
    [all...]
  /external/cblas/testing/
c_s2chke.c 703 } else if (strncmp( sf,"cblas_sspr2",11)==0) {
704 cblas_rout = "cblas_sspr2";
706 cblas_sspr2(INVALID, CblasUpper, 0, ALPHA, X, 1, Y, 1, A );
709 cblas_sspr2(CblasColMajor, INVALID, 0, ALPHA, X, 1, Y, 1, A );
712 cblas_sspr2(CblasColMajor, CblasUpper, INVALID, ALPHA, X, 1, Y, 1, A );
715 cblas_sspr2(CblasColMajor, CblasUpper, 0, ALPHA, X, 0, Y, 1, A );
718 cblas_sspr2(CblasColMajor, CblasUpper, 0, ALPHA, X, 1, Y, 0, A );
721 cblas_sspr2(CblasRowMajor, INVALID, 0, ALPHA, X, 1, Y, 1, A );
724 cblas_sspr2(CblasRowMajor, CblasUpper, INVALID, ALPHA, X, 1, Y, 1, A );
727 cblas_sspr2(CblasRowMajor, CblasUpper, 0, ALPHA, X, 0, Y, 1, A )
    [all...]
c_sblas2.c 557 cblas_sspr2( CblasRowMajor, uplo, *n, *alpha, x, *incx, y, *incy, AP );
578 cblas_sspr2( CblasColMajor, uplo, *n, *alpha, x, *incx, y, *incy, ap );
c_sblat2.f 42 * cblas_sspr2 T PUT F FOR NO TEST. SAME COLUMNS.
118 $ 'cblas_ssyr2 ','cblas_sspr2 '/
    [all...]
  /external/cblas/
Android.mk 113 src/cblas_sspr2.c \
  /external/cblas/include/
cblas.h 308 void cblas_sspr2(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo,
  /external/libgdx/backends/gdx-backend-moe/libs/
intel-moe-ios.jar 

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