/external/cblas/src/ |
cblas_ssyr2.c | 3 * cblas_ssyr2.c 12 void cblas_ssyr2(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, function 43 cblas_xerbla(2, "cblas_ssyr2","Illegal Uplo setting, %d\n",Uplo ); 62 cblas_xerbla(2, "cblas_ssyr2","Illegal Uplo setting, %d\n",Uplo ); 72 } else cblas_xerbla(1, "cblas_ssyr2", "Illegal Order setting, %d\n", order);
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Makefile | 110 cblas_sspr.o cblas_sspr2.o cblas_ssymv.o cblas_ssyr.o cblas_ssyr2.o \
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/external/cblas/testing/ |
c_s2chke.c | 668 } else if (strncmp( sf,"cblas_ssyr2",11)==0) { 669 cblas_rout = "cblas_ssyr2"; 671 cblas_ssyr2(INVALID, CblasUpper, 0, ALPHA, X, 1, Y, 1, A, 1 ); 674 cblas_ssyr2(CblasColMajor, INVALID, 0, ALPHA, X, 1, Y, 1, A, 1 ); 677 cblas_ssyr2(CblasColMajor, CblasUpper, INVALID, ALPHA, X, 1, Y, 1, A, 1 ); 680 cblas_ssyr2(CblasColMajor, CblasUpper, 0, ALPHA, X, 0, Y, 1, A, 1 ); 683 cblas_ssyr2(CblasColMajor, CblasUpper, 0, ALPHA, X, 1, Y, 0, A, 1 ); 686 cblas_ssyr2(CblasColMajor, CblasUpper, 2, ALPHA, X, 1, Y, 1, A, 1 ); 689 cblas_ssyr2(CblasRowMajor, INVALID, 0, ALPHA, X, 1, Y, 1, A, 1 ); 692 cblas_ssyr2(CblasRowMajor, CblasUpper, INVALID, ALPHA, X, 1, Y, 1, A, 1 ) [all...] |
c_sblas2.c | 177 cblas_ssyr2(CblasRowMajor, uplo, *n, *alpha, x, *incx, y, *incy, A, LDA); 184 cblas_ssyr2(CblasColMajor, uplo, *n, *alpha, x, *incx, y, *incy, a, *lda);
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c_sblat2.f | 41 * cblas_ssyr2 T PUT F FOR NO TEST. SAME COLUMNS. 118 $ 'cblas_ssyr2 ','cblas_sspr2 '/ [all...] |
/frameworks/rs/cpu_ref/ |
rsCpuBLAS.inc | 66 RS_APPLY_MACRO_TO(cblas_ssyr2)
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rsCpuIntrinsicBLAS.cpp | 342 cblas_ssyr2(CblasRowMajor, Uplo, call->N, call->alpha.f, (float*)X, call->incX, [all...] |
/external/cblas/ |
Android.mk | 118 src/cblas_ssyr2.c \
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/external/cblas/include/ |
cblas.h | 304 void cblas_ssyr2(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo,
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/external/libgdx/backends/gdx-backend-moe/libs/ |
intel-moe-ios.jar | |