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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/v850/
v850e1.s 8 cmov nz, 22, r2, r3
9 cmov nz, r1, r2, r3
v850e1.d 14 0x0+0e f6 17 14 1b [ ]*cmov nz, -10, r2, sp
15 0x0+12 e1 17 34 1b [ ]*cmov nz, r1, r2, sp
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
arch-10.s 3 # cmov feature
x86-64-arch-2.s 3 # cmov feature
arch-10-1.l 39 [ ]*3[ ]+\# cmov feature
arch-10-2.l 38 [ ]*3[ ]+\# cmov feature
arch-10-3.l 31 [ ]*3[ ]+\# cmov feature
arch-10-4.l 29 [ ]*3[ ]+\# cmov feature
x86-64-arch-2-1.l 33 [ ]*3[ ]+\# cmov feature
x86-64-arch-2-2.l 32 [ ]*3[ ]+\# cmov feature
  /external/flac/libFLAC/include/private/
cpu.h 121 FLAC__bool cmov; member in struct:__anon12677
  /external/v8/test/cctest/
test-disasm-ia32.cc 471 // cmov.
473 __ cmov(overflow, eax, Operand(eax, 0));
474 __ cmov(no_overflow, eax, Operand(eax, 1));
475 __ cmov(below, eax, Operand(eax, 2));
476 __ cmov(above_equal, eax, Operand(eax, 3));
477 __ cmov(equal, eax, Operand(ebx, 0));
478 __ cmov(not_equal, eax, Operand(ebx, 1));
479 __ cmov(below_equal, eax, Operand(ebx, 2));
480 __ cmov(above, eax, Operand(ebx, 3));
481 __ cmov(sign, eax, Operand(ecx, 0))
    [all...]
  /external/flac/libFLAC/
cpu.c 174 info->ia32.cmov = (flags_edx & FLAC__CPUINFO_IA32_CPUID_CMOV )? true : false;
194 fprintf(stderr, " CMOV ....... %c\n", info->ia32.cmov ? 'Y' : 'n');
stream_encoder.c     [all...]
  /external/elfutils/tests/
run-readelf-mixed-corenote.sh 257 HWCAP: 0xafebfbff <fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss tm pbe>
459 HWCAP: 0x780abfd <fpu de pse tsc msr pae mce cx8 apic sep pge cmov mmx fxsr sse sse2>
530 HWCAP: 0xbfebfbff <fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe>
  /external/boringssl/src/crypto/curve25519/
curve25519.c 1245 static void cmov(ge_precomp *t, ge_precomp *u, uint8_t b) { function
    [all...]
  /art/compiler/utils/x86_64/
assembler_x86_64_test.cc     [all...]
assembler_x86_64.h 369 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
370 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
371 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
    [all...]
assembler_x86_64.cc 213 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { function in class:art::x86_64::X86_64Assembler
214 cmov(c, dst, src, true);
217 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { function in class:art::x86_64::X86_64Assembler
226 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { function in class:art::x86_64::X86_64Assembler
    [all...]
  /external/v8/src/ia32/
assembler-ia32.h 633 void cmov(Condition cc, Register dst, Register src) {
634 cmov(cc, dst, Operand(src));
636 void cmov(Condition cc, Register dst, const Operand& src);
    [all...]
code-stubs-ia32.cc 281 __ cmov(not_equal, scratch1, result_reg);
293 __ cmov(greater, result_reg, scratch1);
    [all...]
assembler-ia32.cc 110 CHECK(cpu.has_cmov()); // CMOV support is mandatory.
632 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { function in class:v8::internal::Assembler
    [all...]
  /art/compiler/optimizing/
intrinsics_x86_64.cc 451 __ cmov(is_min ? Condition::kGreater : Condition::kLess, out, op2, is_long);
    [all...]
code_generator_x86_64.cc     [all...]
  /external/valgrind/perf/
tinycc.c     [all...]

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