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    Searched refs:dstreg (Results 1 - 4 of 4) sorted by null

  /external/mesa3d/src/gallium/drivers/svga/svgadump/
svga_shader_dump.c 356 dump_dstreg(struct sh_dstreg dstreg,
362 struct sh_dstreg dstreg; member in union:__anon20826
367 assert( (dstreg.modifier & (SVGA3DDSTMOD_SATURATE | SVGA3DDSTMOD_PARTIALPRECISION)) == dstreg.modifier );
369 if (dstreg.modifier & SVGA3DDSTMOD_SATURATE)
371 if (dstreg.modifier & SVGA3DDSTMOD_PARTIALPRECISION)
373 switch (dstreg.shift_scale) {
399 u.dstreg = dstreg;
401 if (dstreg.write_mask != SVGA3DWRITEMASK_ALL)
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  /external/mesa3d/src/mesa/swrast/
s_atifragshader.c 326 GLint dstreg; local
539 dstreg = inst->DstReg[optype].Index;
540 dstp = machine->Registers[dstreg - GL_REG_0_ATI];
544 write_dst_addr(optype, inst->DstReg[optype].dstMod,
545 inst->DstReg[optype].dstMask, dst[optype],
548 write_dst_addr(1, inst->DstReg[0].dstMod, 0, dst[1], dstp);
  /toolchain/binutils/binutils-2.25/gas/config/
tc-sparc.c 1221 int dstreg = (the_insn.opcode & RD (~0)) >> 25; local
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/r200/
r200_fragshader.c 270 if (inst->DstReg[optype].Index) {
271 GLuint dstreg = inst->DstReg[optype].Index - GL_REG_0_ATI; local
272 GLuint dstmask = inst->DstReg[optype].dstMask;
273 GLuint sat = inst->DstReg[optype].dstMod & GL_SATURATE_BIT_ATI;
274 GLuint dstmod = inst->DstReg[optype].dstMod;
278 SET_INST_2(opnum, optype) |= (dstreg + 1) << R200_TXC_OUTPUT_REG_SHIFT;

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