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Searched
refs:getMachineOpcode
(Results
1 - 22
of
22
) sorted by null
/external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp
82
N->
getMachineOpcode
() == TargetOpcode::IMPLICIT_DEF))
126
const MCInstrDesc &II = TII->get(Def->
getMachineOpcode
());
297
unsigned Opc = Node->
getMachineOpcode
();
356
if (N->isMachineOpcode() && TII->get(N->
getMachineOpcode
()).isCall())
374
if (N->isMachineOpcode() && TII->get(N->
getMachineOpcode
()).isCall())
431
unsigned Opc = MainNode->
getMachineOpcode
();
446
TII->get(N->
getMachineOpcode
()).getImplicitDefs()) {
451
if (NumUsed > TII->get(N->
getMachineOpcode
()).getNumDefs())
536
unsigned POpc = Node->
getMachineOpcode
();
550
unsigned NRegDefs = SchedDAG->TII->get(Node->
getMachineOpcode
()).getNumDefs()
[
all
...]
ResourcePriorityQueue.cpp
258
switch (SU->getNode()->
getMachineOpcode
()) {
261
SU->getNode()->
getMachineOpcode
())))
298
switch (SU->getNode()->
getMachineOpcode
()) {
301
SU->getNode()->
getMachineOpcode
()));
448
const MCInstrDesc &TID = TII->get(N->
getMachineOpcode
());
551
const MCInstrDesc &TID = TII->get(N->
getMachineOpcode
());
553
if (N->
getMachineOpcode
() == TargetOpcode::IMPLICIT_DEF) {
ScheduleDAGRRList.cpp
297
unsigned Opcode = Node->
getMachineOpcode
();
425
if (N->
getMachineOpcode
() ==
428
} else if (N->
getMachineOpcode
() ==
483
if (N->
getMachineOpcode
() ==
487
} else if (N->
getMachineOpcode
() ==
553
Node->
getMachineOpcode
() == (unsigned)TII->getCallFrameDestroyOpcode()) {
758
SUNode->
getMachineOpcode
() == (unsigned)TII->getCallFrameSetupOpcode()) {
829
SUNode->
getMachineOpcode
() == (unsigned)TII->getCallFrameSetupOpcode()) {
842
SUNode->
getMachineOpcode
() == (unsigned)TII->getCallFrameDestroyOpcode()) {
[
all
...]
InstrEmitter.cpp
132
const MCInstrDesc &II = TII->get(User->
getMachineOpcode
());
211
assert(Node->
getMachineOpcode
() != TargetOpcode::IMPLICIT_DEF &&
286
Op.
getMachineOpcode
() == TargetOpcode::IMPLICIT_DEF) {
472
unsigned Opc = Node->
getMachineOpcode
();
723
unsigned Opc = Node->
getMachineOpcode
();
[
all
...]
ScheduleDAGFast.cpp
257
const MCInstrDesc &MCID = TII->get(N->
getMachineOpcode
());
440
const MCInstrDesc &MCID = TII->get(N->
getMachineOpcode
());
519
const MCInstrDesc &MCID = TII->get(Node->
getMachineOpcode
());
SelectionDAGDumper.cpp
47
if (
getMachineOpcode
() < TII->getNumOpcodes())
48
return TII->getName(
getMachineOpcode
());
/external/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp
[
all
...]
/external/llvm/lib/CodeGen/
TargetInstrInfo.cpp
[
all
...]
ScheduleDAG.cpp
59
return &TII->get(Node->
getMachineOpcode
());
/external/llvm/include/llvm/CodeGen/
SelectionDAGNodes.h
167
inline unsigned
getMachineOpcode
() const;
440
/// post-isel opcodes, see
getMachineOpcode
.
474
unsigned
getMachineOpcode
() const {
[
all
...]
/external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp
[
all
...]
ARMISelDAGToDAG.cpp
446
const MCInstrDesc &MCID = TII->get(Use->
getMachineOpcode
());
[
all
...]
ARMISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/AMDGPU/
R600ISelLowering.cpp
[
all
...]
AMDGPUISelDAGToDAG.cpp
184
switch (N->
getMachineOpcode
()) {
187
Subtarget->getInstrInfo()->get(N->
getMachineOpcode
());
[
all
...]
SIISelLowering.cpp
[
all
...]
SIInstrInfo.cpp
53
unsigned Opc0 = N0->
getMachineOpcode
();
54
unsigned Opc1 = N1->
getMachineOpcode
();
98
unsigned Opc0 = Load0->
getMachineOpcode
();
99
unsigned Opc1 = Load1->
getMachineOpcode
();
[
all
...]
/external/llvm/lib/Target/X86/
X86InstrInfo.cpp
[
all
...]
X86ISelDAGToDAG.cpp
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp
[
all
...]
AArch64ISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp
[
all
...]
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