| /external/llvm/test/MC/ARM/ |
| arm_instructions.s | 61 @ CHECK: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1]
62 mvns r1,r2
|
| basic-thumb-instructions.s | 435 mvns r6, r3
437 @ CHECK: mvns r6, r3 @ encoding: [0xde,0x43]
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| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| armv1.s | 41 mvns r0, r0
|
| thumb2_it.s | 56 mvns r0, r1
|
| thumb2_it.d | 56 0+080 <[^>]+> 43c8 mvns r0, r1
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| thumb2_it_auto.d | 56 0+080 <[^>]+> 43c8 mvns r0, r1
|
| armv1.d | 46 0+8c <[^>]*> e1f00000 ? mvns r0, r0
|
| thumb-eabi.d | 41 0+03e <[^>]+> 43ed mvns r5, r5
|
| thumb.d | 42 0+03e <[^>]+> 43ed mvns r5, r5
|
| thumb32.s | 455 mt mvn mvns mvn.w mvns.w
|
| thumb32.d | 633 0[0-9a-f]+ <[^>]+> 43c0 mvns r0, r0
635 0[0-9a-f]+ <[^>]+> 43c5 mvns r5, r0
639 0[0-9a-f]+ <[^>]+> ea7f 0900 mvns\.w r9, r0
640 0[0-9a-f]+ <[^>]+> ea7f 0009 mvns\.w r0, r9
[all...] |
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 255 __ mvns(R0, ShifterOperand(R1));
287 __ mvns(R0, ShifterOperand(R8));
304 __ mvns(R0, ShifterOperand(R1), arm::EQ);
392 __ mvns(R0, ShifterOperand(0x55));
[all...] |
| /external/valgrind/none/tests/arm/ |
| v6intThumb.stdout.exp | 114 MVNS-16 0x10F
115 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, c:v-in 0, cpsr 0x80000000 N
116 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, c:v-in 0, cpsr 0x80000000 N
117 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
118 mvns r0, r1 :: rd 0x7fffffff rm 0x80000000, c:v-in 0, cpsr 0x00000000
119 mvns r0, r1 :: rd 0x7ffffffe rm 0x80000001, c:v-in 0, cpsr 0x00000000
120 mvns r0, r1 :: rd 0x00000000 rm 0xffffffff, c:v-in 0, cpsr 0x40000000 Z
121 mvns r0, r1 :: rd 0x80000000 rm 0x7fffffff, c:v-in 0, cpsr 0x80000000 N
122 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, c:v-in 1, cpsr 0x90000000 N V
123 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, c:v-in 1, cpsr 0x90000000 N
[all...] |
| v6intARM.stdout.exp | 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N
19 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, carryin 0, cpsr 0x80000000 N
20 mvns r0, r1 :: rd 0x7fffffff rm 0x80000000, carryin 0, cpsr 0x00000000
21 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 1, cpsr 0xa0000000 N C
22 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, carryin 1, cpsr 0xa0000000 N C
23 mvns r0, r1 :: rd 0x7fffffff rm 0x80000000, carryin 1, cpsr 0x20000000 C
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32_test.cc | 767 TEST_F(AssemblerArm32Test, Mvns) {
768 T3Helper(&arm::Arm32Assembler::mvns, true, "mvn{cond}s {reg1}, {shift}", "mvns");
|
| assembler_arm.h | 541 virtual void mvns(Register rd, const ShifterOperand& so, Condition cond = AL) { function in class:art::arm::ArmAssembler
[all...] |
