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  /external/mesa3d/src/mesa/drivers/dri/r200/
r200_cmdbuf.c 55 void r200SetUpAtomList( r200ContextPtr rmesa )
59 mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits;
61 make_empty_list(&rmesa->radeon.hw.atomlist);
62 rmesa->radeon.hw.atomlist.name = "atom-list";
64 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.ctx );
65 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.set );
66 insert_at_tail_if( &rmesa->radeon.hw.atomlist, &rmesa->hw.lin )
162 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
    [all...]
r200_sanity.h 4 extern int r200SanityCmdBuffer( r200ContextPtr rmesa,
r200_ioctl.h 48 extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count);
49 extern void r200EmitVertexAOS( r200ContextPtr rmesa,
54 extern void r200EmitVbufPrim( r200ContextPtr rmesa,
60 extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
64 extern void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset);
68 void r200SetUpAtomList( r200ContextPtr rmesa );
76 #define R200_NEWPRIM( rmesa ) \
78 if ( rmesa->radeon.dma.flush ) \
79 rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
    [all...]
r200_state_init.c 166 static int cmdpkt( r200ContextPtr rmesa, int id )
224 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
225 (void) rmesa; \
232 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
233 return (!rmesa->radeon.TclFallback && !ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
239 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
240 return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
246 r200ContextPtr rmesa = R200_CONTEXT(ctx); \
248 return (!rmesa->radeon.TclFallback && ctx->VertexProgram._Enabled && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
257 CHECK( texenv, (rmesa->state.envneeded & (1 << (atom->idx)) && !ctx->ATIFragmentShader._Enabled), 0
    [all...]
r200_state.c 69 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
70 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC];
75 R200_STATECHANGE( rmesa, ctx );
107 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
113 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
114 R200_STATECHANGE( rmesa, ctx );
119 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] );
204 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
205 GLuint cntl = rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &
215 R200_STATECHANGE( rmesa, ctx )
325 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
360 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
378 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
494 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
531 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
554 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
575 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
643 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
664 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
679 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
716 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
733 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
760 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
834 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
870 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
883 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
985 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1080 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1141 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1260 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1272 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1306 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1348 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1360 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1385 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1429 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1441 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1541 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1621 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1677 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1703 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
1718 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2100 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2157 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
2215 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2265 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
2367 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
    [all...]
r200_swtcl.c 64 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
65 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
66 rmesa->radeon.swtcl.vertex_attr_count++; \
72 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
73 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
74 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].offset = (N);
80 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
238 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
290 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
571 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
610 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
636 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
648 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
680 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
750 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
920 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
    [all...]
r200_tcl.c 105 #define LOCAL_VARS r200ContextPtr rmesa = R200_CONTEXT(ctx)
124 R200_STATECHANGE( rmesa, lin ); \
125 radeonEmitState(&rmesa->radeon); \
129 R200_STATECHANGE( rmesa, lin ); \
131 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
134 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
136 radeonEmitState(&rmesa->radeon); \
140 #define ALLOC_ELTS(nr) r200AllocElts( rmesa, nr )
142 static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
144 if (rmesa->radeon.dma.flush == r200FlushElts &
184 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
262 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
293 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
359 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
515 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
539 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
609 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
    [all...]
r200_context.c 74 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
77 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
78 rmesa->radeon.radeonScreen->AGPMode;
88 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
148 r200ContextPtr rmesa = (r200ContextPtr)radeon; local
151 R200_STATECHANGE( rmesa, ctx );
152 if (rmesa->radeon.sarea->tiling_enabled) {
153 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
155 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
157 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext )
210 r200ContextPtr rmesa; local
476 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate; local
    [all...]
r200_ioctl.c 59 r200ContextPtr rmesa = R200_CONTEXT(ctx); local
66 if (rmesa->radeon.sarea)
67 fprintf( stderr, "r200Clear %x %d\n", mask, rmesa->radeon.sarea->pfCurrentPage);
r200_maos_arrays.c 78 r200ContextPtr rmesa = R200_CONTEXT( ctx ); local
117 if (!rmesa->radeon.tcl.aos[i].bo) {
120 &(rmesa->radeon.tcl.aos[nr]),
127 &(rmesa->radeon.tcl.aos[nr]),
176 if (!rmesa->radeon.tcl.aos[nr].bo) {
178 &(rmesa->radeon.tcl.aos[nr]),
190 if (vfmt0 != rmesa->hw.vtx.cmd[VTX_VTXFMT_0] ||
191 vfmt1 != rmesa->hw.vtx.cmd[VTX_VTXFMT_1]) {
192 R200_STATECHANGE( rmesa, vtx );
193 rmesa->hw.vtx.cmd[VTX_VTXFMT_0] = vfmt0
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/radeon/
radeon_ioctl.c 65 void radeonSetUpAtomList( r100ContextPtr rmesa )
67 int i, mtu = rmesa->radeon.glCtx->Const.MaxTextureUnits;
69 make_empty_list(&rmesa->radeon.hw.atomlist);
70 rmesa->radeon.hw.atomlist.name = "atom-list";
72 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.ctx);
73 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.set);
74 insert_at_tail(&rmesa->radeon.hw.atomlist, &rmesa->hw.lin)
171 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
383 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
    [all...]
radeon_sanity.h 4 extern int radeonSanityCmdBuffer( r100ContextPtr rmesa,
radeon_ioctl.h 43 extern void radeonEmitVertexAOS( r100ContextPtr rmesa,
48 extern void radeonEmitVbufPrim( r100ContextPtr rmesa,
56 extern GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
62 extern void radeonEmitAOS( r100ContextPtr rmesa,
66 extern void radeonEmitBlit( r100ContextPtr rmesa,
76 extern void radeonEmitWait( r100ContextPtr rmesa, GLuint flags );
78 extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * );
83 extern void radeonGetAllParams( r100ContextPtr rmesa );
84 extern void radeonSetUpAtomList( r100ContextPtr rmesa );
92 #define RADEON_NEWPRIM( rmesa ) \
    [all...]
radeon_context.c 96 r100ContextPtr rmesa = (r100ContextPtr)radeon; local
99 RADEON_STATECHANGE(rmesa, ctx);
100 if (rmesa->radeon.sarea->tiling_enabled) {
101 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
104 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &=
108 if (sarea->ctx_owner != rmesa->radeon.dri.hwContext) {
109 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
113 static void r100_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
119 r100ContextPtr rmesa = (r100ContextPtr)radeon; local
122 rmesa->hw.zbs.dirty = 1
128 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
176 r100ContextPtr rmesa; local
    [all...]
radeon_tcl.c 108 #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
114 #define GET_MESA_ELTS() rmesa->tcl.Elts
128 RADEON_STATECHANGE( rmesa, lin ); \
129 radeonEmitState(&rmesa->radeon); \
133 RADEON_STATECHANGE( rmesa, lin ); \
135 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
138 rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
140 radeonEmitState(&rmesa->radeon); \
145 #define ALLOC_ELTS(nr) radeonAllocElts( rmesa, nr )
147 static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
173 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
251 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
285 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
357 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
454 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
483 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
543 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
    [all...]
radeon_dma.c 140 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
175 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 );
186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32);
204 void radeon_init_dma(radeonContextPtr rmesa)
206 make_empty_list(&rmesa->dma.free);
207 make_empty_list(&rmesa->dma.wait);
208 make_empty_list(&rmesa->dma.reserved)
423 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
    [all...]
radeon_state.c 68 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
69 int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC];
74 RADEON_STATECHANGE( rmesa, ctx );
106 rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
112 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
113 GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & ~RADEON_COMB_FCN_MASK;
136 FALLBACK( rmesa, RADEON_FALLBACK_BLEND_EQ, fallback );
138 RADEON_STATECHANGE( rmesa, ctx );
139 rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b;
142 rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE
153 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
263 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
299 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
317 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
402 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
439 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
463 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
480 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
495 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
523 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
535 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
562 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
650 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
685 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
725 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
789 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
854 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
919 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1040 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1081 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1120 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1132 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1157 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1201 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1212 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1348 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1403 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1459 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1485 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1500 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1793 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1928 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
1994 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
2041 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
2128 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
    [all...]
radeon_state_init.c 161 static int cmdpkt( r100ContextPtr rmesa, int id )
197 r100ContextPtr rmesa = R100_CONTEXT(ctx); \
198 return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
504 void radeonInitState( r100ContextPtr rmesa )
506 struct gl_context *ctx = rmesa->radeon.glCtx;
509 rmesa->radeon.Fallback = 0;
512 rmesa->radeon.hw.max_state_size = 0;
516 rmesa->hw.ATOM.cmd_size = SZ; \
517 rmesa->hw.ATOM.cmd = (GLuint *)CALLOC(SZ * sizeof(int)); \
518 rmesa->hw.ATOM.lastcmd = (GLuint *)CALLOC(SZ * sizeof(int));
    [all...]
radeon_swtcl.c 69 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR); \
70 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE); \
71 rmesa->radeon.swtcl.vertex_attr_count++; \
77 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0; \
78 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD; \
79 rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].offset = (N);
92 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
255 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
272 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
315 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
412 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
694 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
733 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
743 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
755 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
789 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
847 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
    [all...]
radeon_dma.h 46 void radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes);
47 void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size);
48 void radeon_init_dma(radeonContextPtr rmesa);
49 void radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes);
50 void radeonAllocDmaRegion(radeonContextPtr rmesa,
53 void radeonReleaseDmaRegions(radeonContextPtr rmesa);
57 void *rcommonAllocDmaLowVerts(radeonContextPtr rmesa, int nverts, int vsize);
58 void radeonFreeDmaRegions(radeonContextPtr rmesa);
radeon_texstate.c 265 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
295 rmesa->state.texture.unit[unit].format = 0;
296 rmesa->state.texture.unit[unit].envMode = 0;
595 if ( rmesa->hw.tex[unit].cmd[TEX_PP_TXCBLEND] != color_combine ||
596 rmesa->hw.tex[unit].cmd[TEX_PP_TXABLEND] != alpha_combine ) {
597 RADEON_STATECHANGE( rmesa, tex[unit] );
598 rmesa->hw.tex[unit].cmd[TEX_PP_TXCBLEND] = color_combine;
599 rmesa->hw.tex[unit].cmd[TEX_PP_TXABLEND] = alpha_combine;
740 static void disable_tex_obj_state( r100ContextPtr rmesa,
743 RADEON_STATECHANGE( rmesa, tex[unit] )
863 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1057 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1101 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
1129 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
    [all...]
radeon_maos_arrays.c 86 radeonContextPtr rmesa = RADEON_CONTEXT(ctx); local
101 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * 4, 32);
106 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * count * 4, 32);
146 r100ContextPtr rmesa = R100_CONTEXT( ctx ); local
159 if (!rmesa->tcl.obj.buf)
161 &(rmesa->tcl.aos[nr]),
179 if (!rmesa->tcl.norm.buf)
181 &(rmesa->tcl.aos[nr]),
205 if (!rmesa->tcl.rgba.buf)
207 &(rmesa->tcl.aos[nr])
    [all...]
radeon_state.h 42 extern void radeonInitState( r100ContextPtr rmesa );
50 extern void radeonUploadTexMatrix( r100ContextPtr rmesa,
57 #define FALLBACK( rmesa, bit, mode ) do { \
60 radeonFallback( rmesa->radeon.glCtx, bit, mode ); \
radeon_cmdbuf.h 4 GLboolean rcommonEnsureCmdBufSpace(radeonContextPtr rmesa, int dwords, const char *caller);
5 int rcommonFlushCmdBuf(radeonContextPtr rmesa, const char *caller);
6 int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller);
7 void rcommonInitCmdBuf(radeonContextPtr rmesa);
8 void rcommonDestroyCmdBuf(radeonContextPtr rmesa);
10 void rcommonBeginBatch(radeonContextPtr rmesa,
28 #define BATCH_LOCALS(rmesa) \
29 const radeonContextPtr b_l_rmesa = rmesa
radeon_maos_verts.c 312 r100ContextPtr rmesa = R100_CONTEXT(ctx); local
316 GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
359 if (((rmesa->NeedTexMatrix >> unit) & 1) &&
360 (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
361 radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ;
366 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
367 RADEON_STATECHANGE( rmesa, tcl );
368 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
375 if (rmesa->tcl.vertex_format == setup_tab[i].vertex_format &&
376 rmesa->radeon.tcl.aos[0].bo
    [all...]

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