| /toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/aarch64/ |
| unallocated-encoding.s | 8 #st3 {v28.h, v29.h, v30.h}[0], [x30]
10 #st4 {v27.h, v28.h, v29.h, v30.h}[0], [x30]
18 #st3 {v28.s, v29.s, v30.s}[0], [x30]
20 #st4 {v27.s, v28.s, v29.s, v30.s}[0], [x30]
28 #st3 {v28.d, v29.d, v30.d}[0], [x30]
30 #st4 {v27.d, v28.d, v29.d, v30.d}[0], [x30]
38 #st3 {v28.d, v29.d, v30.d}[0], [x30]
40 #st4 {v27.d, v28.d, v29.d, v30.d}[0], [x30]
48 #st3 {v28.d, v29.d, v30.d}[0], [x30]
50 #st4 {v27.d, v28.d, v29.d, v30.d}[0], [x30
[all...] |
| /external/libhevc/common/arm64/ |
| ihevc_sao_edge_offset_class0.s | 161 mov v28.b[15], w11 //II Iteration vsetq_lane_u8(pu1_src_left[ht - row], pu1_cur_row_tmp, 15)
169 EXT v28.16b, v28.16b , v26.16b,#15 //II Iteration pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 15)
174 cmhi v30.16b, v26.16b , v28.16b //II vcgtq_u8(pu1_cur_row, pu1_cur_row_tmp)
180 cmhi v0.16b, v28.16b , v26.16b //II vcltq_u8(pu1_cur_row, pu1_cur_row_tmp)
181 mov v28.b[0], w11 //II pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
189 EXT v28.16b, v26.16b , v28.16b,#1 //II pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 1)
203 cmhi v30.16b, v26.16b , v28.16b //II vcgtq_u8(pu1_cur_row, pu1_cur_row_tmp)
205 cmhi v0.16b, v28.16b , v26.16b //II vcltq_u8(pu1_cur_row, pu1_cur_row_tmp
[all...] |
| ihevc_sao_edge_offset_class0_chroma.s | 184 mov v28.h[7], w11 //II vsetq_lane_u16(pu1_src_left[ht - row], pu1_cur_row_tmp, 14,15)
192 EXT v28.16b, v28.16b , v30.16b,#14 //II pu1_cur_row_tmp = vextq_u8(pu1_cur_row_tmp, pu1_cur_row, 14)
195 cmhi v26.16b, v30.16b , v28.16b //II vcgtq_u8(pu1_cur_row, pu1_cur_row_tmp)
198 cmhi v24.16b, v28.16b , v30.16b //II vcltq_u8(pu1_cur_row, pu1_cur_row_tmp)
206 mov v28.b[0], w11 //II pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[16], pu1_cur_row_tmp, 0)
213 mov v28.b[1], w11 //II pu1_cur_row_tmp = vsetq_lane_u8(pu1_src_cpy[17], pu1_cur_row_tmp, 1)
216 EXT v28.16b, v30.16b , v28.16b,#2 //II pu1_cur_row_tmp = vextq_u8(pu1_cur_row, pu1_cur_row_tmp, 2)
225 cmhi v26.16b, v30.16b , v28.16b //II vcgtq_u8(pu1_cur_row, pu1_cur_row_tmp
[all...] |
| ihevc_inter_pred_chroma_vert_w16inp.s | 200 smull v28.4s, v1.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
203 smlal v28.4s, v2.4h, v17.4h
205 smlal v28.4s, v3.4h, v18.4h
207 smlal v28.4s, v4.4h, v19.4h
221 sqshrn v28.4h, v28.4s,#6 //right shift
236 sqrshrun v28.8b, v28.8h,#6 //rounding shift
244 st1 {v28.s}[0],[x9],x3 //stores the loaded value
252 smull v28.4s, v1.4h, v16.4h //vmull_s16(src_tmp2, coeff_0
[all...] |
| ihevc_sao_edge_offset_class1_chroma.s | 152 LD1 {v28.16b},[x11],#16 //pu1_top_row = vld1q_u8(pu1_src_top_cpy || pu1_src - src_strd)
159 cmhi v5.16b, v3.16b , v28.16b //vcgtq_u8(pu1_cur_row, pu1_top_row)
162 cmhi v19.16b, v28.16b , v3.16b //vcltq_u8(pu1_cur_row, pu1_top_row)
187 Uxtl2 v28.8h, v18.16b //II pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row)))
197 SUB v28.16b, v24.16b , v22.16b //II sign_down = vreinterpretq_s8_u8(vsubq_u8(cmp_lt, cmp_gt))
205 NEG v16.16b, v28.16b //II sign_up = vnegq_s8(sign_down)
207 ADD v22.16b, v22.16b , v28.16b //II edge_idx = vaddq_s8(edge_idx, sign_down)
227 Uxtl2 v28.8h, v3.16b //pi2_tmp_cur_row.val[1] = vreinterpretq_s16_u16(vmovl_u8(vget_high_u8(pu1_cur_row)))
231 SADDW v28.8h, v28.8h , v17.8b //pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset
[all...] |
| ihevc_inter_pred_chroma_vert.s | 245 umull v28.8h, v6.8b, v1.8b //mul_res 2
248 umlsl v28.8h, v5.8b, v0.8b
251 umlal v28.8h, v7.8b, v2.8b
253 umlsl v28.8h, v16.8b, v3.8b
264 sqrshrun v28.8b, v28.8h,#6
278 st1 {v28.8b},[x7],x3 //stores the loaded value
304 umull v28.8h, v6.8b, v1.8b //mul_res 2
307 umlsl v28.8h, v5.8b, v0.8b
310 umlal v28.8h, v7.8b, v2.8
[all...] |
| ihevc_inter_pred_chroma_vert_w16inp_w16out.s | 199 smull v28.4s, v1.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
204 smlal v28.4s, v2.4h, v17.4h
205 smlal v28.4s, v3.4h, v18.4h
207 smlal v28.4s, v4.4h, v19.4h
219 sqshrn v28.4h, v28.4s,#6 //right shift
241 st1 {v28.2s},[x9],x3 //stores the loaded value
248 smull v28.4s, v1.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
249 smlal v28.4s, v2.4h, v17.4h
250 smlal v28.4s, v3.4h, v18.4
[all...] |
| ihevc_itrans_recon_16x16.s | 257 smull v28.4s, v6.4h, v1.h[1] //// y1 * sin3(part of b2)
262 smlal v28.4s, v7.4h, v3.h[3] //// y1 * sin3 - y3 * cos1(part of b2)
284 smlsl v28.4s, v8.4h, v1.h[3]
290 smlsl v28.4s, v9.4h, v0.h[3]
333 smlsl v28.4s, v6.4h, v3.h[1] //// y1 * sin3(part of b2)
338 smlal v28.4s, v7.4h, v2.h[1] //// y1 * sin3 - y3 * cos1(part of b2)
345 smlal v28.4s, v8.4h, v0.h[1]
351 smlal v28.4s, v9.4h, v2.h[3]
390 add v14.4s, v16.4s , v28.4s
391 sub v26.4s, v16.4s , v28.4
[all...] |
| ihevc_intra_pred_chroma_planar.s | 198 umull v28.8h, v5.8b, v0.8b
201 umlal v28.8h, v6.8b, v11.8b
205 umlal v28.8h, v31.8b, v4.8b
207 umlal v28.8h, v25.8b, v1.8b
215 add v28.8h, v28.8h , v16.8h
217 sshl v28.8h, v28.8h, v14.8h
230 xtn v13.8b, v28.8h
268 umull v28.8h, v18.8b, v0.8
[all...] |
| ihevc_itrans_recon_8x8.s | 196 smull v28.4s, v6.4h, v1.h[1] //// y1 * sin3(part of b2)
204 smlsl v28.4s, v7.4h, v0.h[1] //// y1 * sin3 - y3 * cos1(part of b2)
236 smlal v28.4s, v14.4h, v1.h[3] //// y1 * sin3 - y3 * cos1 + y5 * sin1(part of b2)
247 smlal v28.4s, v15.4h, v0.h[3] //// b2 = y1 * sin3 - y3 * cos1 + y5 * sin1 + y7 * cos3(part of x2,x5)
258 add v24.4s, v22.4s , v28.4s //// a2 + b2(part of x2)
259 sub v22.4s, v22.4s , v28.4s //// a2 - b2(part of x5)
261 add v28.4s, v18.4s , v26.4s //// a1 + b1(part of x1)
271 sqrshrn v6.4h, v28.4s,#shift_stage1_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage1_idct)
306 smull v28.4s, v6.4h, v1.h[1] //// y1 * sin3(part of b2)
311 smlsl v28.4s, v7.4h, v0.h[1] //// y1 * sin3 - y3 * cos1(part of b2
[all...] |
| ihevc_weighted_pred_bi.s | 198 dup v28.4s,w10 //vmovq_n_s32(0-shift)
201 neg v28.4s, v28.4s
237 sshl v4.4s,v4.4s,v28.4s //vshlq_s32(i4_tmp1_t1, tmp_shift_t)
249 sshl v6.4s,v6.4s,v28.4s
259 sshl v19.4s,v19.4s,v28.4s
271 sshl v18.4s,v18.4s,v28.4s
|
| ihevc_weighted_pred_uni.s | 156 dup v28.4s,w6 //vmovq_n_s32(tmp_shift)
160 neg v28.4s, v28.4s
183 sshl v4.4s,v4.4s,v28.4s
193 sshl v6.4s,v6.4s,v28.4s
199 sshl v7.4s,v7.4s,v28.4s
208 sshl v16.4s,v16.4s,v28.4s
|
| /external/libavc/common/armv8/ |
| ih264_intra_pred_luma_16x16_av8.s | 513 shl v28.8h, v4.8h, #3
517 sub v30.8h, v30.8h , v28.8h
519 add v28.8h, v30.8h , v6.8h
520 add v26.8h, v28.8h , v0.8h
521 add v28.8h, v28.8h , v2.8h
523 sqrshrun v21.8b, v28.8h, #5
525 add v28.8h, v28.8h , v6.8h
528 sqrshrun v23.8b, v28.8h, #
[all...] |
| ih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s | 91 movi v28.8h, #0x14 // Filter coeff 20 into Q13
113 mla v18.8h, v20.8h , v28.8h
117 mla v20.8h, v24.8h , v28.8h
123 mla v22.8h, v24.8h , v28.8h
136 smlal v26.4s, v0.4h, v28.4h
140 smlal2 v23.4s, v0.8h, v28.8h
161 smlal v26.4s, v25.4h, v28.4h
165 smlal2 v22.4s, v25.8h, v28.8h
194 mla v18.8h, v20.8h , v28.8h
198 mla v20.8h, v24.8h , v28.8
[all...] |
| ih264_inter_pred_filters_luma_horz_av8.s | 132 ext v28.8b, v5.8b , v6.8b, #5 ////extract a[5] (column1,row1)
135 uaddl v14.8h, v28.8b, v5.8b //// a0 + a5 (column1,row1)
140 ext v28.8b, v5.8b , v6.8b, #2 ////extract a[2] (column1,row1)
143 umlal v14.8h, v28.8b, v1.8b //// a0 + a5 + 20a2 (column1,row1)
148 ext v28.8b, v5.8b , v6.8b, #3 ////extract a[3] (column1,row1)
151 umlal v14.8h, v28.8b, v1.8b //// a0 + a5 + 20a2 + 20a3 (column1,row1)
156 ext v28.8b, v5.8b , v6.8b, #1 ////extract a[1] (column1,row1)
159 umlsl v14.8h, v28.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row1)
164 ext v28.8b, v5.8b , v6.8b, #4 ////extract a[4] (column1,row1)
167 umlsl v14.8h, v28.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column1,row1
[all...] |
| ih264_inter_pred_luma_horz_qpel_vert_qpel_av8.s | 164 uaddl v28.8h, v18.8b, v23.8b
165 umlal v28.8h, v20.8b, v30.8b
166 umlal v28.8h, v21.8b, v30.8b
167 umlsl v28.8h, v19.8b, v31.8b
168 umlsl v28.8h, v22.8b, v31.8b
175 sqrshrun v28.8b, v28.8h, #5
205 urhadd v28.16b, v28.16b , v26.16b
212 st1 {v28.2s, v29.2s}, [x1], x3 // store row
[all...] |
| ih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s | 152 movi v28.8h, #0x14 // Filter coeff 20 into Q13
175 mla v18.8h, v20.8h , v28.8h
179 mla v20.8h, v24.8h , v28.8h
185 mla v22.8h, v24.8h , v28.8h
199 smlal v26.4s, v0.4h, v28.4h
203 smlal2 v22.4s, v0.8h, v28.8h
224 smlal v26.4s, v18.4h, v28.4h
228 smlal2 v22.4s, v18.8h, v28.8h
262 mla v18.8h, v20.8h , v28.8h
266 mla v20.8h, v24.8h , v28.8
[all...] |
| ih264_deblk_luma_av8.s | 124 uabd v28.16b, v10.16b, v6.16b
131 cmhi v20.16b, v16.16b , v28.16b //Q10=(Ap<Beta)
138 usubl v28.8h, v8.8b, v2.8b //Q14 = (p1 - q1)L
143 add v24.8h, v24.8h , v28.8h //
155 uaddl v28.8h, v17.8b, v11.8b //
163 sub v28.8h, v28.8h , v26.8h //Q14,Q5 = [p2 + (p0+q0+1)>>1] - (p1<<1)
167 sqshrn v29.8b, v28.8h, #1 //
168 sqshrn v28.8b, v10.8h, #1 //Q14 = i_macro_p1
169 mov v28.d[1], v29.d[0
[all...] |
| ih264_inter_pred_luma_horz_qpel_av8.s | 140 ext v28.8b, v5.8b , v6.8b , #5
143 uaddl v14.8h, v28.8b, v5.8b //// a0 + a5 (column1,row1)
148 ext v28.8b, v5.8b , v6.8b , #2
151 umlal v14.8h, v28.8b, v1.8b //// a0 + a5 + 20a2 (column1,row1)
156 ext v28.8b, v5.8b , v6.8b , #3
159 umlal v14.8h, v28.8b, v1.8b //// a0 + a5 + 20a2 + 20a3 (column1,row1)
164 ext v28.8b, v5.8b , v6.8b , #1
167 umlsl v14.8h, v28.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row1)
172 ext v28.8b, v5.8b , v6.8b , #4
175 umlsl v14.8h, v28.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column1,row1
[all...] |
| ih264_inter_pred_chroma_av8.s | 135 dup v28.8b, w10
153 umull v20.8h, v0.8b, v28.8b
161 umull v22.8h, v1.8b, v28.8b
169 umull v24.8h, v5.8b, v28.8b
177 umull v16.8h, v6.8b, v28.8b
184 umull v20.8h, v10.8b, v28.8b
189 umull v24.8h, v11.8b, v28.8b
196 umull v20.8h, v0.8b, v28.8b
202 umull v22.8h, v1.8b, v28.8b
215 umull v24.8h, v5.8b, v28.8
[all...] |
| /external/llvm/test/MC/AArch64/ |
| neon-facge-facgt.s | 36 facgt v31.8h, v29.8h, v28.8h
37 facgt v31.4s, v29.4s, v28.4s
41 faclt v31.8h, v28.8h, v29.8h
42 faclt v31.4s, v28.4s, v29.4s
47 // CHECK: facgt v31.8h, v29.8h, v28.8h // encoding: [0xbf,0x2f,0xdc,0x6e]
48 // CHECK: facgt v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xef,0xbc,0x6e]
52 // CHECK: facgt v31.8h, v29.8h, v28.8h // encoding: [0xbf,0x2f,0xdc,0x6e]
53 // CHECK: facgt v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xef,0xbc,0x6e]
|
| neon-frsqrt-frecp.s | 24 frecps v31.8h, v29.8h, v28.8h
25 frecps v31.4s, v29.4s, v28.4s
30 // CHECK: frecps v31.8h, v29.8h, v28.8h // encoding: [0xbf,0x3f,0x5c,0x4e]
31 // CHECK: frecps v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xff,0x3c,0x4e]
|
| /external/libavc/encoder/armv8/ |
| ih264e_half_pel_av8.s | 111 ext v28.8b, v5.8b , v6.8b , #5
114 uaddl v14.8h, v28.8b, v5.8b //// a0 + a5 (column1,row1)
124 ext v28.8b, v5.8b , v6.8b , #2
127 umlal v14.8h, v28.8b, v1.8b //// a0 + a5 + 20a2 (column1,row1)
137 ext v28.8b, v5.8b , v6.8b , #3
140 umlal v14.8h, v28.8b, v1.8b //// a0 + a5 + 20a2 + 20a3 (column1,row1)
150 ext v28.8b, v5.8b , v6.8b , #1
153 umlsl v14.8h, v28.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row1)
163 ext v28.8b, v5.8b , v6.8b , #4
166 umlsl v14.8h, v28.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column1,row1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| fp-const0-parse.s | 39 fcmgt v2.2d, v28.2d, #0
58 fcmgt v2.2d, v28.2d, #0.0
|
| /external/llvm/test/MC/Hexagon/ |
| v60-vcmp.s | 23 #CHECK: 1c8dfc11 { q1 &= vcmp.gt(v28.b{{ *}},{{ *}}v13.b) }
24 q1&=vcmp.gt(v28.b,v13.b)
35 #CHECK: 1c9cfca8 { q0 ^= vcmp.gt(v28.uw{{ *}},{{ *}}v28.uw) }
36 q0^=vcmp.gt(v28.uw,v28.uw)
|
