/external/llvm/lib/Target/SystemZ/AsmParser/ |
SystemZAsmParser.cpp | 120 void addExpr(MCInst &Inst, const MCExpr *Expr) const { 123 Inst.addOperand(MCOperand::createImm(0)); 125 Inst.addOperand(MCOperand::createImm(CE->getValue())); 127 Inst.addOperand(MCOperand::createExpr(Expr)); 253 void addBDVAddrOperands(MCInst &Inst, unsigned N) const { 256 Inst.addOperand(MCOperand::createReg(Mem.Base)); 257 addExpr(Inst, Mem.Disp); 258 Inst.addOperand(MCOperand::createReg(Mem.Index)); 268 void addRegOperands(MCInst &Inst, unsigned N) const { 270 Inst.addOperand(MCOperand::createReg(getReg())) [all...] |
/external/llvm/lib/Target/X86/AsmParser/ |
X86AsmParser.cpp | 722 bool processInstruction(MCInst &Inst, const OperandVector &Ops); 725 /// instrumentation around Inst. 726 void EmitInstruction(MCInst &Inst, OperandVector &Operands, MCStreamer &Out); [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineCalls.cpp | [all...] |
InstructionCombining.cpp | 73 STATISTIC(NumDeadInst , "Number of dead inst eliminated"); [all...] |
/external/llvm/lib/Transforms/Instrumentation/ |
DataFlowSanitizer.cpp | 322 Value *combineOperandShadows(Instruction *Inst); 812 Instruction *Inst = &(*i)->front(); 817 Instruction *Next = Inst->getNextNode(); 818 // DFSanVisitor may delete Inst, so keep track of whether it was a [all...] |
/external/llvm/lib/Transforms/ObjCARC/ |
ObjCARCOpts.cpp | 497 bool VisitInstructionBottomUp(Instruction *Inst, BasicBlock *BB, 503 bool VisitInstructionTopDown(Instruction *Inst, 686 Instruction *Inst = &*I++; 688 ARCInstKind Class = GetBasicARCInstKind(Inst); 690 DEBUG(dbgs() << "Visiting: Class: " << Class << "; " << *Inst << "\n"); 706 DEBUG(dbgs() << "Erasing no-op cast: " << *Inst << "\n"); 707 EraseInstruction(Inst); 716 CallInst *CI = cast<CallInst>(Inst); 734 CallInst *CI = cast<CallInst>(Inst); 754 if (OptimizeRetainRVCall(F, Inst)) [all...] |
/external/llvm/lib/Transforms/Scalar/ |
IndVarSimplify.cpp | 608 Instruction *Inst = cast<Instruction>(InVal); 609 if (!L->contains(Inst)) 615 const SCEV *ExitValue = SE->getSCEVAtScope(Inst, L->getParentLoop()); 629 for (auto IB = Inst->user_begin(), IE = Inst->user_end(); 659 bool HighCost = Rewriter.isHighCostExpansion(ExitValue, L, Inst); 661 expandSCEVIfNeeded(Rewriter, ExitValue, L, Inst, PN->getType()); 664 << " LoopVal = " << *Inst << "\n"); 666 if (!isValidRewrite(Inst, ExitVal)) { 694 Instruction *Inst = cast<Instruction>(PN->getIncomingValue(Phi.Ith)) [all...] |
RewriteStatepointsForGC.cpp | 214 static void findLiveSetAtInst(Instruction *inst, GCPtrLivenessData &Data, 296 Instruction *inst = CS.getInstruction(); local 299 findLiveSetAtInst(inst, OriginalLivenessData, LiveSet); [all...] |
/prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
inst.go | 13 // An Inst is a single instruction. 14 type Inst struct { 389 func (i Inst) String() string {
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/prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
inst.go | 13 // An Inst is a single instruction. 14 type Inst struct { 389 func (i Inst) String() string {
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/external/clang/lib/CodeGen/ |
CodeGenFunction.h | 771 llvm::Instruction *Inst; 775 PeepholeProtection() : Inst(nullptr) {} [all...] |
/external/clang/lib/Sema/ |
SemaTemplateInstantiateDecl.cpp | 330 LabelDecl *Inst = LabelDecl::Create(SemaRef.Context, Owner, D->getLocation(), 332 Owner->addDecl(Inst); 333 return Inst; 343 NamespaceAliasDecl *Inst 351 Owner->addDecl(Inst); 352 return Inst; 470 TypeAliasTemplateDecl *Inst 473 AliasInst->setDescribedAliasTemplate(Inst); 475 Inst->setPreviousDecl(PrevAliasTemplate); 477 Inst->setAccess(D->getAccess()) [all...] |
/external/llvm/lib/Analysis/ |
ValueTracking.cpp | [all...] |
/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/external/llvm/lib/Transforms/IPO/ |
GlobalOpt.cpp | 395 // The user of the global must be a GEP Inst or a ConstantExpr GEP. [all...] |
/external/llvm/utils/TableGen/ |
CodeGenDAGPatterns.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | 163 InvokeInst *Inst = dyn_cast<InvokeInst>(BB->getTerminator()); 164 if (!Inst) continue; 165 BasicBlock *UnwindDest = Inst->getUnwindDest(); 173 InvokeToIntrinsicsMap[Inst] = std::make_pair(Exn, Sel); 263 Instruction *Inst = *I; 264 Inst->eraseFromParent(); 289 Instruction *Inst = &*I++; 290 Inst->eraseFromParent(); [all...] |
/external/llvm/lib/CodeGen/ |
CodeGenPrepare.cpp | 183 bool optimizeExtractElementInst(Instruction *Inst); 188 Instruction *&Inst, [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 84 bool validateInstruction(MCInst &Inst, SmallVectorImpl<SMLoc> &Loc); [all...] |
/external/llvm/lib/Transforms/Utils/ |
SimplifyCFG.cpp | 88 "speculate-one-expensive-inst", cl::Hidden, cl::init(true), [all...] |
/external/llvm/lib/Transforms/Vectorize/ |
SLPVectorizer.cpp | 602 : Inst(nullptr), FirstInBundle(nullptr), NextInBundle(nullptr), 660 os << "/ " << *Inst; 662 os << '[' << *Inst; 665 os << ';' << *SD->Inst; 670 os << *Inst; 674 Instruction *Inst; 780 for (Use &U : BundleMember->Inst->operands()) { [all...] |
LoopVectorize.cpp | 598 if (const Instruction *Inst = dyn_cast_or_null<Instruction>(Ptr)) 599 B.SetCurrentDebugLocation(Inst->getDebugLoc()); 753 void setInsertPos(Instruction *Inst) { InsertPos = Inst; } [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
MipsAsmParser.cpp | 131 unsigned checkTargetMatchPredicate(MCInst &Inst) override; 177 tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, 180 bool expandJalWithRegs(MCInst &Inst, SMLoc IDLoc, 191 bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc, 198 bool expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc, 201 void expandMemInst(MCInst &Inst, SMLoc IDLoc, 205 bool expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc, 208 bool expandAliasImmediate(MCInst &Inst, SMLoc IDLoc, 211 bool expandBranchImm(MCInst &Inst, SMLoc IDLoc, 214 bool expandCondBranches(MCInst &Inst, SMLoc IDLoc [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 192 bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands, 194 bool validatetSTMRegList(const MCInst &Inst, const OperandVector &Operands, 332 void cvtThumbMultiply(MCInst &Inst, const OperandVector &); 333 void cvtThumbBranches(MCInst &Inst, const OperandVector &); 335 bool validateInstruction(MCInst &Inst, const OperandVector &Ops); 336 bool processInstruction(MCInst &Inst, const OperandVector &Ops, MCStreamer &Out); 377 unsigned checkTargetMatchPredicate(MCInst &Inst) override; [all...] |