| /prebuilts/ndk/current/platforms/android-23/arch-mips64/usr/include/machine/ |
| regnum.h | 67 #define RA 31
|
| /prebuilts/ndk/current/platforms/android-24/arch-mips/usr/include/machine/ |
| regnum.h | 67 #define RA 31
|
| /prebuilts/ndk/current/platforms/android-24/arch-mips64/usr/include/machine/ |
| regnum.h | 67 #define RA 31
|
| /prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/machine/ |
| regnum.h | 67 #define RA 31
|
| /external/libpcap/ |
| tokdefs.h | 98 RA = 308,
220 #define RA 308
|
| grammar.c | 413 RA = 308,
535 #define RA 308
988 "ADDR4", "RA", "TA", "LINK", "GEQ", "LEQ", "NEQ", "ID", "EID", "HID",
[all...] |
| /libcore/luni/src/test/java/libcore/java/util/ |
| EnumSetTest.java | 105 HF, TA, W, RE, OS, IR, PT, AU, HG, TL, PB, BI, PO, AT, RN, FR, RA, AC, TH, PA, U, NP, PU,
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| alpha-opc.c | 57 /* The RB field when it is the same as the RA field in the same insn.
59 the RA field into the RB field, and the extraction function just
208 #define RA (UNUSED + 1)
210 #define RB (RA + 1)
240 /* The RB field when it must be the same as the RA field. */
248 /* The RC field when it can *default* to RA. */
258 /* The FC field when it can *default* to RA. */
412 #define ARG_BRA { RA, BDISP }
416 #define ARG_MEM { RA, MDISP, PRB }
418 #define ARG_OPR { RA, RB, DRC1
[all...] |
| nds32-asm.c | 101 {"ra", 15, 5, 0, HW_GPR, NULL},
218 #define RA(r) (r << 15)
225 {"lbi", "=rt,[%ra{+%i15s}]", OP6 (LBI), 4, ATTR_ALL, 0, NULL, 0, NULL},
226 {"lhi", "=rt,[%ra{+%i15s1}]", OP6 (LHI), 4, ATTR_ALL, 0, NULL, 0, NULL},
227 {"lwi", "=rt,[%ra{+%i15s2}]", OP6 (LWI), 4, ATTR_ALL, 0, NULL, 0, NULL},
228 {"lbi.bi", "=rt,[%ra],%i15s", OP6 (LBI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
229 {"lhi.bi", "=rt,[%ra],%i15s1", OP6 (LHI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
230 {"lwi.bi", "=rt,[%ra],%i15s2", OP6 (LWI_BI), 4, ATTR_ALL, 0, NULL, 0, NULL},
231 {"sbi", "%rt,[%ra{+%i15s}]", OP6 (SBI), 4, ATTR_ALL, 0, NULL, 0, NULL},
232 {"shi", "%rt,[%ra{+%i15s1}]", OP6 (SHI), 4, ATTR_ALL, 0, NULL, 0, NULL}
[all...] |
| ppc-opc.c | 458 /* The RA field in an D, DS, DQ, X, XO, M, or MDS form instruction. */
459 #define RA NSI + 1
463 /* As above, but 0 in the RA field means zero, not r0. */
464 #define RA0 RA + 1
467 /* The RA field in the DQ form lq or an lswx instruction, which have special
473 /* The RA field in a D or X form instruction which is an updating
474 load, which means that the RA field may not be zero and may not
479 /* The RA field in an lmw instruction, which has special value
484 /* The RA field in a D or X form instruction which is an updating
485 store or an updating floating point load, which means that the RA
[all...] |
| /external/deqp/framework/common/ |
| tcuTexture.hpp | 51 RA,
[all...] |
| tcuTexture.cpp | 303 case TextureFormat::RA: return 2;
556 case TextureFormat::RA:
723 static const TextureSwizzle RA = {{ TextureSwizzle::CHANNEL_0, TextureSwizzle::CHANNEL_ZERO, TextureSwizzle::CHANNEL_ZERO, TextureSwizzle::CHANNEL_1 }};
740 case TextureFormat::RA: return RA;
777 static const TextureSwizzle RA = {{ TextureSwizzle::CHANNEL_0, TextureSwizzle::CHANNEL_3, TextureSwizzle::CHANNEL_LAST, TextureSwizzle::CHANNEL_LAST }};
794 case TextureFormat::RA: return RA;
[all...] |
| /external/llvm/lib/Analysis/ |
| ScalarEvolution.cpp | 502 const Argument *RA = cast<Argument>(RV);
503 unsigned LArgNo = LA->getArgNo(), RArgNo = RA->getArgNo();
537 const APInt &RA = RC->getAPInt();
538 unsigned LBitWidth = LA.getBitWidth(), RBitWidth = RA.getBitWidth();
541 return LA.ult(RA) ? -1 : 1;
546 const SCEVAddRecExpr *RA = cast<SCEVAddRecExpr>(RHS);
549 const Loop *LLoop = LA->getLoop(), *RLoop = RA->getLoop();
558 unsigned LNumOps = LA->getNumOperands(), RNumOps = RA->getNumOperands();
564 long X = compare(LA->getOperand(i), RA->getOperand(i));
[all...] |
| ValueTracking.cpp | [all...] |
| /external/llvm/lib/Transforms/IPO/ |
| MergeFunctions.cpp | 527 Attribute RA = *RI;
528 if (LA < RA)
530 if (RA < LA)
701 const ConstantArray *RA = cast<ConstantArray>(R);
708 cast<Constant>(RA->getOperand(i))))
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| cr16.h | 34 r12_L = 12, r13_L = 13, ra = 14, sp_L = 15, enumerator in enum:__anon76107
38 era = 14, sp = 15, RA,
|
| /external/pcre/dist/sljit/ |
| sljitNativeTILEGX_64.c | 72 #define RA 55
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 547 const APInt &RA = RC->getAPInt();
550 if (RA.isAllOnesValue())
553 if (RA == 1)
562 const APInt &RA = RC->getAPInt();
563 if (LA.srem(RA) != 0)
565 return SE.getConstant(LA.sdiv(RA));
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| /toolchain/binutils/binutils-2.25/bfd/ |
| elfxx-mips.c | 920 ? 0x03e0782d /* daddu t7,ra */ \
921 : 0x03e07821)) /* addu t7,ra */
923 #define STUB_JALR 0x0320f809 /* jalr t9,ra */
936 #define STUB_MOVE_MICROMIPS 0x0dff /* move t7,ra */
939 ? 0x581f7950 /* daddu t7,ra,zero */ \
940 : 0x001f7950) /* addu t7,ra,zero */
944 #define STUB_JALR32_MICROMIPS 0x03f90f3c /* jalr ra,t9 */
[all...] |
| /external/valgrind/VEX/priv/ |
| guest_ppc_toIR.c | 346 /* Extract RA (1st source register) field, instr[20:16] */
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-mips.c | 105 #define RA 31
5428 unsigned int reglist, sregs, ra, regno1, regno2; local
[all...] |
| /external/robolectric/v1/lib/main/ |
| sqlite-jdbc-3.7.2.jar | |
