/prebuilts/ndk/current/platforms/android-19/arch-mips/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-19/arch-x86/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-3/arch-arm/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-4/arch-arm/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-5/arch-arm/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-8/arch-arm/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-9/arch-arm/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/prebuilts/ndk/current/platforms/android-9/arch-x86/usr/include/linux/ |
qic117.h | 77 #define QIC117_COMMANDS { {NULL, 0x00, 0x00, mode, 0, discretional}, {"soft reset", 0x00, 0x00, motion, 1, required}, {"report next bit", 0x00, 0x00, report, 0, required}, {"pause", 0x36, 0x24, motion, 1, required}, {"micro step pause", 0x36, 0x24, motion, 1, required}, {"alternate command timeout", 0x00, 0x00, mode, 0, required}, {"report drive status", 0x00, 0x00, report, 0, required}, {"report error code", 0x01, 0x01, report, 0, required}, {"report drive (…) [all...] |
/external/llvm/test/MC/Disassembler/Mips/mips3/ |
valid-mips3.txt | 3 0x00 0x00 0x00 0x00 # CHECK: nop 4 0x00 0x00 0x00 0x09 # CHECK: jr $zero 5 0x00 0x00 0x00 0x0c # CHECK: syscall [all...] |
/prebuilts/go/darwin-x86/src/image/color/palette/ |
palette.go | 24 color.RGBA{0x00, 0x00, 0x00, 0xff}, 25 color.RGBA{0x00, 0x00, 0x44, 0xff}, 26 color.RGBA{0x00, 0x00, 0x88, 0xff}, 27 color.RGBA{0x00, 0x00, 0xcc, 0xff}, 28 color.RGBA{0x00, 0x44, 0x00, 0xff} [all...] |
/prebuilts/go/linux-x86/src/image/color/palette/ |
palette.go | 24 color.RGBA{0x00, 0x00, 0x00, 0xff}, 25 color.RGBA{0x00, 0x00, 0x44, 0xff}, 26 color.RGBA{0x00, 0x00, 0x88, 0xff}, 27 color.RGBA{0x00, 0x00, 0xcc, 0xff}, 28 color.RGBA{0x00, 0x44, 0x00, 0xff} [all...] |
/external/valgrind/none/tests/amd64/ |
nan80and64.c | 83 = { 0x7f, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 86 = { 0x7f, 0xf4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } [all...] |
/hardware/qcom/msm8994/original-kernel-headers/linux/mfd/wcd9xxx/ |
wcd9xxx_registers.h | 5 #define WCD9XXX_A_CHIP_CTL (0x00) 49 #define WCD9XXX_A_RX_COM_BIAS__POR (0x00) 57 #define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR (0x00) 60 #define WCD9XXX_A_CDC_MBHC_EN_CTL__POR (0x00) 62 #define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR (0x00) 78 #define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR (0x00) 80 #define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR (0x00) 82 #define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR (0x00) 84 #define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR (0x00) 86 #define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR (0x00) [all...] |
/hardware/qcom/msm8x26/original-kernel-headers/linux/mfd/wcd9xxx/ |
wcd9xxx_registers.h | 5 #define WCD9XXX_A_CHIP_CTL (0x00) 49 #define WCD9XXX_A_RX_COM_BIAS__POR (0x00) 57 #define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR (0x00) 60 #define WCD9XXX_A_CDC_MBHC_EN_CTL__POR (0x00) 62 #define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR (0x00) 78 #define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR (0x00) 80 #define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR (0x00) 82 #define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR (0x00) 84 #define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR (0x00) 86 #define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR (0x00) [all...] |
/hardware/qcom/msm8x84/original-kernel-headers/linux/mfd/wcd9xxx/ |
wcd9xxx_registers.h | 5 #define WCD9XXX_A_CHIP_CTL (0x00) 49 #define WCD9XXX_A_RX_COM_BIAS__POR (0x00) 57 #define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR (0x00) 60 #define WCD9XXX_A_CDC_MBHC_EN_CTL__POR (0x00) 62 #define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR (0x00) 78 #define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR (0x00) 80 #define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR (0x00) 82 #define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR (0x00) 84 #define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR (0x00) 86 #define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR (0x00) [all...] |
/external/llvm/test/MC/AMDGPU/ |
vop3.s | 14 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x40] 15 // VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40] 20 // SICI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x02,0xd0,0x04,0x0d,0x02,0x00] 21 // VI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00] 28 // SICI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x20] 29 // VI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x20] 32 // SICI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x02,0xd0,0x04,0x0d,0x02,0x40] 33 // VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40 [all...] |
/external/llvm/test/MC/Disassembler/AArch64/ |
arm64-basic-a64-undefined.txt | 4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s 5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s 9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s 10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s 11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s 14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s 17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s 18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck % [all...] |
/external/webrtc/webrtc/modules/rtp_rtcp/source/ |
h264_bitstream_parser_unittest.cc | 18 uint8_t kH264SpsPps[] = {0x00, 0x00, 0x00, 0x01, 0x67, 0x42, 0x80, 0x20, 0xda, 19 0x01, 0x40, 0x16, 0xe8, 0x06, 0xd0, 0xa1, 0x35, 0x00, 20 0x00, 0x00, 0x01, 0x68, 0xce, 0x06, 0xe2}; 24 0x00, 0x00, 0x00, 0x01, 0x67, 0x42, 0x80, 0x20, 0xda, 0x01, 0x40, 0x16, 25 0xe8, 0x06, 0xd0, 0xa1, 0x35, 0x00, 0x00, 0x00, 0x01, 0x68, 0xce, 0x06 [all...] |
/hardware/qcom/msm8994/kernel-headers/linux/mfd/wcd9xxx/ |
wcd9320_registers.h | 51 #define TAIKO_A_PIN_CTL_OE0__POR (0x00) 54 #define TAIKO_A_PIN_CTL_OE1__POR (0x00) 56 #define TAIKO_A_PIN_CTL_DATA0__POR (0x00) 59 #define TAIKO_A_PIN_CTL_DATA1__POR (0x00) 61 #define TAIKO_A_HDRIVE_GENERIC__POR (0x00) 71 #define TAIKO_A_PROCESS_MONITOR_CTL1__POR (0x00) 74 #define TAIKO_A_PROCESS_MONITOR_CTL2__POR (0x00) 79 #define TAIKO_A_QFUSE_CTL__POR (0x00) 81 #define TAIKO_A_QFUSE_STATUS__POR (0x00) 84 #define TAIKO_A_QFUSE_DATA_OUT0__POR (0x00) [all...] |
/hardware/qcom/msm8996/kernel-headers/linux/mfd/wcd9xxx/ |
wcd9320_registers.h | 51 #define TAIKO_A_PIN_CTL_OE0__POR (0x00) 54 #define TAIKO_A_PIN_CTL_OE1__POR (0x00) 56 #define TAIKO_A_PIN_CTL_DATA0__POR (0x00) 59 #define TAIKO_A_PIN_CTL_DATA1__POR (0x00) 61 #define TAIKO_A_HDRIVE_GENERIC__POR (0x00) 71 #define TAIKO_A_PROCESS_MONITOR_CTL1__POR (0x00) 74 #define TAIKO_A_PROCESS_MONITOR_CTL2__POR (0x00) 79 #define TAIKO_A_QFUSE_CTL__POR (0x00) 81 #define TAIKO_A_QFUSE_STATUS__POR (0x00) 84 #define TAIKO_A_QFUSE_DATA_OUT0__POR (0x00) [all...] |
/hardware/qcom/msm8x26/kernel-headers/linux/mfd/wcd9xxx/ |
wcd9320_registers.h | 51 #define TAIKO_A_PIN_CTL_OE0__POR (0x00) 54 #define TAIKO_A_PIN_CTL_OE1__POR (0x00) 56 #define TAIKO_A_PIN_CTL_DATA0__POR (0x00) 59 #define TAIKO_A_PIN_CTL_DATA1__POR (0x00) 61 #define TAIKO_A_HDRIVE_GENERIC__POR (0x00) 71 #define TAIKO_A_PROCESS_MONITOR_CTL1__POR (0x00) 74 #define TAIKO_A_PROCESS_MONITOR_CTL2__POR (0x00) 79 #define TAIKO_A_QFUSE_CTL__POR (0x00) 81 #define TAIKO_A_QFUSE_STATUS__POR (0x00) 84 #define TAIKO_A_QFUSE_DATA_OUT0__POR (0x00) [all...] |
/hardware/qcom/msm8x84/kernel-headers/linux/mfd/wcd9xxx/ |
wcd9320_registers.h | 51 #define TAIKO_A_PIN_CTL_OE0__POR (0x00) 54 #define TAIKO_A_PIN_CTL_OE1__POR (0x00) 56 #define TAIKO_A_PIN_CTL_DATA0__POR (0x00) 59 #define TAIKO_A_PIN_CTL_DATA1__POR (0x00) 61 #define TAIKO_A_HDRIVE_GENERIC__POR (0x00) 71 #define TAIKO_A_PROCESS_MONITOR_CTL1__POR (0x00) 74 #define TAIKO_A_PROCESS_MONITOR_CTL2__POR (0x00) 79 #define TAIKO_A_QFUSE_CTL__POR (0x00) 81 #define TAIKO_A_QFUSE_STATUS__POR (0x00) 84 #define TAIKO_A_QFUSE_DATA_OUT0__POR (0x00) [all...] |
/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/ |
valid.txt | 3 0x00 0x64 0x11 0x3c # CHECK: absq_s.ph $3, $4 4 0x00 0x64 0x01 0x3c # CHECK: absq_s.qb $3, $4 5 0x00 0x64 0x21 0x3c # CHECK: absq_s.w $3, $4 6 0x00 0xa4 0x19 0x0d # CHECK: addu.ph $3, $4, $5 7 0x00 0xa4 0x18 0xcd # CHECK: addu.qb $3, $4, $5 8 0x00 0xa4 0x1d 0x0d # CHECK: addu_s.ph $3, $4, $5 9 0x00 0xa4 0x1c 0xcd # CHECK: addu_s.qb $3, $4, $5 10 0x00 0xa4 0x19 0x4d # CHECK: adduh.qb $3, $4, $5 11 0x00 0xa4 0x1d 0x4d # CHECK: adduh_r.qb $3, $4, $5 12 0x00 0xa4 0x1b 0x85 # CHECK: addsc $3, $4, $ [all...] |
/external/llvm/test/MC/Disassembler/ARM/ |
basic-arm-instructions-v8.txt | 7 0x70 0x00 0x00 0xe1 29 0x10 0x0e 0x00 0xee 32 0x10 0x0f 0x00 0xee 41 0x00 0x0e 0x40 0xec 44 0x00 0x0f 0x40 0xec 47 0x00 0x0e 0x50 0xec 50 0x00 0x0f 0x50 0xec 53 0x00 0x0e 0x80 0xec 56 0x00 0x0e 0x90 0xe [all...] |