| /external/llvm/lib/Target/Mips/ |
| Mips16InstrFormats.td | 229 // Format RRI instruction class in Mips : <|opcode|rx|ry|imm5|>
238 bits<5> imm5;
245 let Inst{4-0} = imm5;
|
| /external/valgrind/VEX/priv/ |
| host_arm_defs.c | 478 /* --------- Reg or imm5 operands --------- */
480 ARMRI5* ARMRI5_I5 ( UInt imm5 ) {
483 ri5->ARMri5.I5.imm5 = imm5;
484 vassert(imm5 > 0 && imm5 <= 31); // zero is not allowed
497 vex_printf("%u", ri5->ARMri5.I5.imm5);
2785 UInt imm5 = ri->ARMri5.I5.imm5; local
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| aarch64-asm.c | 94 imm5<3:0> <V>
893 int num; /* num of consecutive '0's on the right side of imm5<3:0>. */
903 /* imm5<3:0> q <t>
[all...] |
| aarch64-dis.c | 287 imm5<3:0> <V>
[all...] |
| bfin-dis.c | 90 { "imm5", 5, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0},
467 #define imm5(x) fmtconst (c_imm5, x, 0, outf) macro
[all...] |
| nds32-asm.c | 171 {"ib5u", 10, 5, 0, HW_UINT, NULL}, /* imm5 field in ALU. */
172 {"ib5s", 10, 5, 0, HW_INT, NULL}, /* imm5 field in ALU. */
[all...] |
| aarch64-opc.c | 180 { 16, 5 }, /* imm5: in conditional compare (immediate) instructions. */
[all...] |
| arm-dis.c | 2472 long imm5; local
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | [all...] |
| /external/vixl/src/vixl/a64/ |
| simulator-a64.cc | 2906 int imm5 = instr->ImmNEON5(); local
3615 int imm5 = instr->ImmNEON5(); local
[all...] |
| assembler-a64.h | [all...] |
| disasm-a64.cc | 3076 int imm5 = instr->ImmNEON5(); local
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| aarch64.h | 527 /* AdvSIMD vector register arrangement specifier encoded in "imm5<3:0>:Q". */
|
| mips.h | [all...] |
| /external/v8/src/arm/ |
| assembler-arm.cc | 2968 int imm5 = 32 - fraction_bits; local
[all...] |
| /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/ |
| asm7.go | [all...] |
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/ |
| asm7.go | [all...] |
| /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/ |
| asm7.go | [all...] |
| /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/ |
| asm7.go | [all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-score.c | [all...] |
| /art/compiler/utils/arm/ |
| assembler_thumb2.cc | 367 ((offset & 0x3e) << (3 - 1)) | // Move imm5 from bits 1-5 to bits 3-7.
456 (offset << (6 - 2)); // Move imm5 from bits 2-6 to bits 6-10.
[all...] |
| /toolchain/binutils/binutils-2.25/ld/testsuite/ |
| ChangeLog-2013 | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrFormats.td | [all...] |
| ARMInstrInfo.td | 519 // {4-0} imm5 shift amount.
520 // asr #32 encoded as imm5 == 0.
[all...] |
| /external/valgrind/none/tests/arm/ |
| v6intThumb.c | [all...] |
