/external/llvm/test/CodeGen/PowerPC/ |
rotl-2.ll | 11 %C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1] 18 %B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1] 28 %C = lshr i32 %A, 27 ; <i32> [#uses=1] 34 %B = lshr i32 %A, 5 ; <i32> [#uses=1]
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rotl-rotr-crash.ll | 8 %0 = lshr <4 x i32> %a, <i32 16, i32 16, i32 16, i32 16>
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rotl.ll | 9 %tmp.10 = lshr i32 %x, %tmp.7 ; <i32> [#uses=2] 18 %tmp.4 = lshr i32 %x, %sh ; <i32> [#uses=2] 27 %tmp.7 = lshr i32 %x, 27 ; <i32> [#uses=2] 35 %tmp.3 = lshr i32 %x, 5 ; <i32> [#uses=2]
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/external/llvm/test/CodeGen/SystemZ/ |
int-mul-07.ll | 16 %highx = lshr i64 %mulx, 32 29 %highx = lshr i64 %mulx, 32 43 %highx = lshr i64 %mulx, 32 59 %highx = lshr i64 %mulx, 32
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int-mul-08.ll | 16 %highx = lshr i128 %mulx, 64 36 %highx = lshr i128 %mulx, 64 52 %highx = lshr i128 %mulx, 67 68 %highx = lshr i128 %mulx, 64 95 %highx = lshr i128 %mulx, 64 110 %highx = lshr i128 %mulx, 64 127 %highx = lshr i128 %mulx, 64 142 %highx = lshr i128 %mulx, 64 157 %highx = lshr i128 %mulx, 64 174 %highx = lshr i128 %mulx, 6 [all...] |
shift-04.ll | 11 %partb = lshr i32 %a, 31 22 %partb = lshr i32 %a, 1 33 %partb = lshr i32 %a, 0 45 %partb = lshr i32 %a, %amtb 58 %partb = lshr i32 %a, %sub 72 %partb = lshr i32 %a, %sub 87 %partb = lshr i32 %a, %subtrunc 101 %partb = lshr i32 %a, %sub 116 %partb = lshr i32 %a, %sub 129 %partb = lshr i32 %a, %sub [all...] |
/external/llvm/test/CodeGen/Thumb/ |
2007-01-31-RegInfoAssert.ll | 10 %tmp14 = lshr i32 %tmp7, 1
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/external/llvm/test/CodeGen/X86/ |
2009-01-31-BigShift2.ll | 7 %C = lshr i512 %B, 448 ; <i512> [#uses=1]
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2009-06-05-VZextByteShort.ll | 10 %x3 = lshr i32 %x2, 1 24 %x3 = lshr i32 %x2, 1 38 %x3 = lshr i32 %x2, 1 52 %x3 = lshr i32 %x2, 1
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2009-08-19-LoadNarrowingMiscompile.ll | 9 %sroa.store.elt2 = lshr i96 %srcval1, 64
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2012-07-15-tconst_shl.ll | 7 %B9 = lshr <16 x i32> zeroinitializer, %Shuff7
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h-registers-3.ll | 8 %1 = lshr i16 %0, 8
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live-out-reg-info.ll | 9 %t0 = lshr i32 %a, 23
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pr16360.ll | 6 %shr = lshr i64 %conv, 2
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pr3250.ll | 10 %1 = lshr i32 %0, -9 ; <i32> [#uses=1]
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shift-combine.ll | 13 %tmp2 = lshr i32 %x, 2 55 %shr = lshr exact i32 %sub, 3 65 %shr = lshr exact i32 %sub, 3 75 %shr = lshr exact i32 %sub, 2
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x86-64-double-precision-shift-left.ll | 18 %shr = lshr i64 %b, 63 35 %shr = lshr i64 %b, 62 53 %shr = lshr i64 %b, 57 71 %shr = lshr i64 %b, 1
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x86-64-double-precision-shift-right.ll | 17 %1 = lshr i64 %a, 1 35 %1 = lshr i64 %a, 2 53 %1 = lshr i64 %a, 7 69 %1 = lshr i64 %a, 63
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/external/llvm/test/ExecutionEngine/MCJIT/ |
test-shift.ll | 17 %tr1 = lshr i32 1, %shift.upgrd.6 ; <i32> [#uses=0] 18 %tr2 = lshr i32 1, 5 ; <i32> [#uses=0] 25 %tr1.u = lshr i64 1, 5 ; <i64> [#uses=0] 27 %tr2.u = lshr i64 1, %shift.upgrd.9 ; <i64> [#uses=0]
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/external/llvm/test/ExecutionEngine/OrcMCJIT/ |
test-shift.ll | 17 %tr1 = lshr i32 1, %shift.upgrd.6 ; <i32> [#uses=0] 18 %tr2 = lshr i32 1, 5 ; <i32> [#uses=0] 25 %tr1.u = lshr i64 1, 5 ; <i64> [#uses=0] 27 %tr2.u = lshr i64 1, %shift.upgrd.9 ; <i64> [#uses=0]
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/external/llvm/test/Transforms/InstCombine/ |
2012-08-28-udiv_ashl.ll | 13 %div = lshr i32 %x, 2 35 %div = lshr i32 %x, 2 48 %div = lshr i80 %x, 2 54 %div = lshr i32 %x, %notconst
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all-bits-shift.ll | 17 %shr.i = lshr i32 2072, %lnot.ext 18 %call.lobit = lshr i32 %shr.i, 7 26 %shr.i.1 = lshr i32 2072, %lnot.ext.1 27 %call.lobit.1 = lshr i32 %shr.i.1, 7
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apint-cast.ll | 8 %tmp21 = lshr i37 %tmp, 8 ; <i37> [#uses=1] 9 ; CHECK: %tmp21 = lshr i17 %a, 8 21 %tmp21 = lshr i577 %tmp, 9 ; <i577> [#uses=1] 22 ; CHECK: %tmp21 = lshr i167 %a, 9
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compare-signs.ll | 28 ; CHECK: [[SHIFT:%.*]] = lshr i32 [[XOR1]], 31 30 %0 = lshr i32 %a, 31 ; <i32> [#uses=1] 31 %1 = lshr i32 %b, 31 ; <i32> [#uses=1] 46 ; CHECK: lshr i32 %0, 31 48 %0 = lshr i32 %a, 29 ; <i32> [#uses=1] 49 %1 = lshr i32 %b, 29 ; <i32> [#uses=1] 67 %r = lshr i32 %na, 31 80 %r = lshr i64 %na, 63 93 %r = lshr i64 %na, 63
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/external/clang/test/CodeGen/ |
arm-be-result-return.c | 19 // CHECK: lshr i32 34 // CHECK: lshr i32
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