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Searched
full:march
(Results
101 - 125
of
6069
) sorted by null
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
attr-march-iwmmxt2.d
1
# name: attributes for -
march
=iwmmxt2
3
# as: -
march
=iwmmxt2
attr-march-xscale.d
1
# name: attributes for -
march
=xscale
3
# as: -
march
=xscale
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-m68k/
merge-error-1c.d
1
#source: merge-error-1a.s -
march
=isaaplus
2
#source: merge-error-1b.s -
march
=isab
merge-error-1d.d
1
#source: merge-error-1a.s -
march
=isaa -mmac
2
#source: merge-error-1b.s -
march
=isaa -memac
merge-ok-1b.d
1
#source: merge-error-1a.s -
march
=isaa -mno-div -mmac
2
#source: merge-error-1b.s -
march
=isaa -mno-div -mfloat
merge-ok-1c.d
1
#source: merge-error-1a.s -
march
=cpu32
2
#source: merge-error-1b.s -
march
=cpu32
/external/llvm/test/CodeGen/SPARC/
ctpop.ll
1
; RUN: llc < %s -
march
=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
2
; RUN: llc < %s -
march
=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9
3
; RUN: llc < %s -
march
=sparc -mcpu=v9 | FileCheck %s -check-prefix=V8
4
; RUN: llc < %s -
march
=sparc -mcpu=ultrasparc | FileCheck %s -check-prefix=V8
5
; RUN: llc < %s -
march
=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V8
6
; RUN: llc < %s -
march
=sparc -mcpu=niagara | FileCheck %s -check-prefix=V8
7
; RUN: llc < %s -
march
=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
8
; RUN: llc < %s -
march
=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
9
; RUN: llc < %s -
march
=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9
10
; RUN: llc < %s -
march
=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=SPARC6
[
all
...]
/external/llvm/test/CodeGen/Mips/
check-adde-redundant-moves.ll
1
; RUN: llc < %s -
march
=mips -mcpu=mips2 | FileCheck %s \
3
; RUN: llc < %s -
march
=mips -mcpu=mips32 | FileCheck %s \
5
; RUN: llc < %s -
march
=mips -mcpu=mips32r2 | FileCheck %s \
7
; RUN: llc < %s -
march
=mips -mcpu=mips32r3 | FileCheck %s \
9
; RUN: llc < %s -
march
=mips -mcpu=mips32r5 | FileCheck %s \
11
; RUN: llc < %s -
march
=mips -mcpu=mips32r6 | FileCheck %s \
13
; RUN: llc < %s -
march
=mips64 -mcpu=mips3 | FileCheck %s -check-prefix=ALL
14
; RUN: llc < %s -
march
=mips64 -mcpu=mips4 | FileCheck %s -check-prefix=ALL
15
; RUN: llc < %s -
march
=mips64 -mcpu=mips64 | FileCheck %s -check-prefix=ALL
16
; RUN: llc < %s -
march
=mips64 -mcpu=mips64r2 | FileCheck %s -check-prefix=AL
[
all
...]
adjust-callstack-sp.ll
1
; RUN: llc < %s -
march
=mips -mattr=mips16 | FileCheck %s -check-prefix=M16
2
; RUN: llc < %s -
march
=mips -mcpu=mips2 | FileCheck %s -check-prefix=GP32
3
; RUN: llc < %s -
march
=mips -mcpu=mips32 | FileCheck %s -check-prefix=GP32
4
; RUN: llc < %s -
march
=mips -mcpu=mips32r6 | FileCheck %s -check-prefix=GP32
5
; RUN: llc < %s -
march
=mips -mcpu=mips3 | FileCheck %s -check-prefix=GP64
6
; RUN: llc < %s -
march
=mips -mcpu=mips64 | FileCheck %s -check-prefix=GP64
7
; RUN: llc < %s -
march
=mips -mcpu=mips64r6 | FileCheck %s -check-prefix=GP64
stack-alignment.ll
1
; RUN: llc -
march
=mipsel < %s | FileCheck %s -check-prefix=32
2
; RUN: llc -
march
=mipsel -mattr=+fp64 < %s | FileCheck %s -check-prefix=32
3
; RUN: llc -
march
=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
DbgValueOtherTargets.test
1
RUN: llc -O0 -
march
=mips -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
check-noat.ll
1
; RUN: llc -
march
=mipsel < %s | FileCheck %s
trap.ll
1
; RUN: llc -
march
=mipsel -mcpu=mips32 < %s | FileCheck %s
/external/llvm/test/CodeGen/Mips/Fast-ISel/
check-disabled-mcpus.ll
1
; RUN: llc -
march
=mips -mcpu=mips2 -O0 -relocation-model=pic \
3
; RUN: llc -
march
=mips -mcpu=mips3 -O0 -relocation-model=pic \
5
; RUN: llc -
march
=mips -mcpu=mips4 -O0 -relocation-model=pic \
8
; RUN: llc -
march
=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
11
; RUN: llc -
march
=mips -mcpu=mips64 -O0 -relocation-model=pic \
13
; RUN: llc -
march
=mips -mcpu=mips64r2 -O0 -relocation-model=pic \
15
; RUN: llc -
march
=mips -mcpu=mips64r3 -O0 -relocation-model=pic \
17
; RUN: llc -
march
=mips -mcpu=mips64r5 -O0 -relocation-model=pic \
19
; RUN: llc -
march
=mips -mcpu=mips32r6 -O0 -relocation-model=pic \
/external/llvm/test/CodeGen/Mips/llvm-ir/
sqrt.ll
1
; RUN: llc < %s -
march
=mipsel -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
2
; RUN: llc < %s -
march
=mips -mcpu=mips32r2 -mattr=+micromips | FileCheck %s
3
; RUN: llc < %s -
march
=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s
/external/llvm/test/CodeGen/PowerPC/
LargeAbsoluteAddr.ll
1
; RUN: llc < %s -
march
=ppc32 -mtriple=powerpc-apple-darwin | \
3
; RUN: llc < %s -
march
=ppc64 -mtriple=powerpc-apple-darwin | \
5
; RUN: llc < %s -
march
=ppc64 -mtriple=powerpc-apple-darwin | \
calls.ll
3
; RUN: llc < %s -
march
=ppc32 | \
5
; RUN: llc < %s -
march
=ppc32 | \
7
; RUN: llc < %s -
march
=ppc32 | \
retaddr.ll
1
; RUN: llc < %s -
march
=ppc32 | grep mflr
2
; RUN: llc < %s -
march
=ppc32 | grep lwz
3
; RUN: llc < %s -
march
=ppc64 | grep "ld r., 16(r1)"
/external/llvm/test/CodeGen/X86/
2004-02-13-FrameReturnAddress.ll
1
; RUN: llc < %s -
march
=x86 | grep "(%esp"
2
; RUN: llc < %s -
march
=x86 | grep "pushl %ebp" | count 1
3
; RUN: llc < %s -
march
=x86 | grep "popl %ebp" | count 1
vec_set-C.ll
1
; RUN: llc < %s -
march
=x86 -mtriple=i386-linux-gnu -mattr=+sse2,-avx | grep movq
2
; RUN: llc < %s -
march
=x86 -mtriple=i386-linux-gnu -mattr=+sse2,-avx | grep mov | count 1
3
; RUN: llc < %s -
march
=x86-64 -mtriple=x86_64-pc-linux -mattr=+sse2,-avx | grep movd
x86-64-double-shifts-var.ll
1
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon | FileCheck %s
2
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon-tbird | FileCheck %s
3
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon-4 | FileCheck %s
4
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon-xp | FileCheck %s
5
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon-mp | FileCheck %s
6
; RUN: llc < %s -
march
=x86-64 -mcpu=k8 | FileCheck %s
7
; RUN: llc < %s -
march
=x86-64 -mcpu=opteron | FileCheck %s
8
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon64 | FileCheck %s
9
; RUN: llc < %s -
march
=x86-64 -mcpu=athlon-fx | FileCheck %s
10
; RUN: llc < %s -
march
=x86-64 -mcpu=k8-sse3 | FileCheck %
[
all
...]
/external/llvm/test/CodeGen/AMDGPU/
infinite-loop-evergreen.ll
2
; RUN: llc -
march
=r600 -mcpu=cypress < %s | FileCheck %s
/external/llvm/test/CodeGen/CPP/
2012-02-05-UnitVarCrash.ll
1
; RUN: llc < %s -
march
=cpp
/external/llvm/test/CodeGen/Hexagon/
predicate-copy.ll
1
; RUN: llc -
march
=hexagon -mcpu=hexagonv4 -O3 < %s | FileCheck %s
/external/llvm/test/CodeGen/MSP430/
DbgValueOtherTargets.test
1
RUN: llc -O0 -
march
=msp430 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
Completed in 1635 milliseconds
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