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  /external/llvm/test/CodeGen/X86/
widen_arith-3.ll 33 %tmp4 = load i32, i32* %i ; <i32> [#uses=1]
35 %arrayidx6 = getelementptr <3 x i16>, <3 x i16>* %tmp5, i32 %tmp4 ; <<3 x i16>*> [#uses=1]
widen_arith-4.ll 31 %tmp4 = load i32, i32* %i ; <i32> [#uses=1]
33 %arrayidx6 = getelementptr <5 x i16>, <5 x i16>* %tmp5, i32 %tmp4 ; <<5 x i16>*> [#uses=1]
widen_arith-5.ll 32 %tmp4 = load i32, i32* %i ; <i32> [#uses=1]
34 %arrayidx6 = getelementptr <3 x i32>, <3 x i32>* %tmp5, i32 %tmp4 ; <<3 x i32>*> [#uses=1]
widen_arith-6.ll 31 %tmp4 = load i32, i32* %i ; <i32> [#uses=1]
33 %arrayidx6 = getelementptr <3 x float>, <3 x float>* %tmp5, i32 %tmp4 ; <<3 x float>*> [#uses=1]
widen_cast-1.ll 37 %tmp4 = load <4 x i16>*, <4 x i16>** %src.addr ; <<4 x i16>*> [#uses=1]
38 %arrayidx5 = getelementptr <4 x i16>, <4 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1]
invalid-shift-immediate.ll 20 %tmp4 = call i32 (...) @bar( ) nounwind ; <i32> [#uses=0]
lsr-wrap.ll 27 %tmp4 = tail call i32 @func_8(i8 zeroext %tmp3) nounwind ; <i32> [#uses=0]
  /external/llvm/test/Transforms/CodeGenPrepare/AMDGPU/
no-sink-addrspacecast.ll 13 %tmp4 = getelementptr inbounds float, float addrspace(1)* %arg1, i64 %tmp3
14 %tmp5 = load float, float addrspace(1)* %tmp4, align 4
  /external/llvm/test/Transforms/GlobalOpt/
heap-sra-phi.ll 31 %tmp4 = getelementptr %struct.foo, %struct.foo* %tmp, i32 %i.0.reg2mem.0, i32 1 ; <i32*> [#uses=1]
32 %tmp5 = load i32 , i32 * %tmp4
  /external/llvm/test/Transforms/IndVarSimplify/
exit_value_test2.ll 49 %tmp4 = load i32, i32* %a, align 4
51 ret i32 %tmp4
loop_evaluate9.ll 46 %tmp4 = add i8 %tmp38.i, -4 ; <i8> [#uses=2]
48 %tmp25.i = zext i8 %tmp4 to i16 ; <i16> [#uses=1]
60 %tmp7 = icmp eq i8 %tmp4, -28 ; <i1> [#uses=1]
  /external/llvm/test/Transforms/InstCombine/
2006-12-08-Phi-ICmp-Op-Fold.ll 21 %tmp4 = getelementptr { i64 }, { i64 }* %tmp3, i64 0, i32 0 ; <i64*> [#uses=1]
22 store i64 %p3.0, i64* %tmp4
2006-12-08-Select-ICmp.ll 21 %tmp4 = getelementptr { i64 }, { i64 }* %tmp3, i32 0, i32 0 ; <i64*> [#uses=1]
22 store i64 %p3.0, i64* %tmp4
2007-10-28-stacksave.ll 15 %tmp4 = srem i32 %n.0, 47 ; <i32> [#uses=1]
16 %tmp5 = add i32 %tmp4, 1 ; <i32> [#uses=5]
xor.ll 240 ; CHECK-NEXT: %tmp4 = and i32 %h, %g
241 ; CHECK-NEXT: ret i32 %tmp4
244 %tmp4 = xor i32 %tmp2, %g ; <i32> [#uses=1]
245 ret i32 %tmp4
250 ; CHECK-NEXT: %tmp4 = and i32 %a, %b
251 ; CHECK-NEXT: ret i32 %tmp4
254 %tmp4 = and i32 %tmp2, %a ; <i32> [#uses=1]
255 ret i32 %tmp4
  /external/llvm/test/Transforms/ScalarRepl/
inline-vector.ll 40 %tmp4 = load i32, i32* %i, align 4
41 %inc = add nsw i32 %tmp4, 1
  /external/llvm/test/Transforms/SimplifyCFG/
basictest.ll 62 %tmp4 = icmp eq i8 %tmp3, 1
63 br i1 %tmp4, label %bb2, label %bb3
  /external/llvm/test/Transforms/Inline/
inline_cleanup.ll 22 %tmp4 = and i32 %X, 2 ; <i32> [#uses=1]
23 %tmp4.upgrd.2 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
24 br i1 %tmp4.upgrd.2, label %cond_next7, label %cond_true5
  /bionic/libc/arch-arm64/generic/bionic/
strlen.S 49 #define tmp4 x10 define
76 orr tmp4, data2, #REP8_7f
78 bics has_nul2, tmp3, tmp4
  /external/libvpx/libvpx/vpx_dsp/mips/
loopfilter_4_msa.c 117 v8i16 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5; local
145 ILVRL_H2_SH(tmp1, tmp0, tmp4, tmp5);
151 ST4x8_UB(tmp4, tmp5, src, pitch);
  /external/llvm/lib/CodeGen/
IntrinsicLowering.cpp 184 Value *Tmp4 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 24),
198 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or1");
200 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32");
212 Value* Tmp4 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8),
235 Tmp4 = Builder.CreateAnd(Tmp4,
249 Tmp4 = Builder.CreateOr(Tmp4, Tmp3, "bswap.or3");
252 Tmp4 = Builder.CreateOr(Tmp4, Tmp2, "bswap.or6")
    [all...]
  /external/llvm/test/CodeGen/AArch64/
arm64-addr-type-promotion.ll 54 %tmp4 = load i8, i8* %arrayidx14, align 1
55 %cmp17 = icmp eq i8 %tmp3, %tmp4
59 %cmp22 = icmp ugt i8 %tmp3, %tmp4
arm64-dup.ll 9 %tmp4 = insertelement <8 x i8> %tmp3, i8 %A, i32 3
10 %tmp5 = insertelement <8 x i8> %tmp4, i8 %A, i32 4
23 %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 3
24 ret <4 x i16> %tmp4
49 %tmp4 = insertelement <16 x i8> %tmp3, i8 %A, i32 3
50 %tmp5 = insertelement <16 x i8> %tmp4, i8 %A, i32 4
71 %tmp4 = insertelement <8 x i16> %tmp3, i16 %A, i32 3
72 %tmp5 = insertelement <8 x i16> %tmp4, i16 %A, i32 4
85 %tmp4 = insertelement <4 x i32> %tmp3, i32 %A, i32 3
86 ret <4 x i32> %tmp4
    [all...]
  /external/llvm/test/CodeGen/ARM/
vdup.ll 10 %tmp4 = insertelement <8 x i8> %tmp3, i8 %A, i32 3
11 %tmp5 = insertelement <8 x i8> %tmp4, i8 %A, i32 4
24 %tmp4 = insertelement <4 x i16> %tmp3, i16 %A, i32 3
25 ret <4 x i16> %tmp4
50 %tmp4 = insertelement <16 x i8> %tmp3, i8 %A, i32 3
51 %tmp5 = insertelement <16 x i8> %tmp4, i8 %A, i32 4
72 %tmp4 = insertelement <8 x i16> %tmp3, i16 %A, i32 3
73 %tmp5 = insertelement <8 x i16> %tmp4, i16 %A, i32 4
86 %tmp4 = insertelement <4 x i32> %tmp3, i32 %A, i32 3
87 ret <4 x i32> %tmp4
    [all...]
  /external/llvm/test/CodeGen/Thumb/
2011-05-11-DAGLegalizer.ll 19 %agg.tmp4 = alloca %struct.RRRRRRRR, align 4
36 %tmp8 = bitcast %struct.RRRRRRRR* %agg.tmp4 to i8*
51 call void (i8*, i32, i8*, i8*, ...) @CLLoggingLog(i8* %tmp, i32 2, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @__PRETTY_FUNCTION__._ZN12CLGll, i32 0, i32 0), i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i32 0, i32 0), %struct.RRRRRRRR* byval %agg.tmp, %struct.RRRRRRRR* byval %agg.tmp4, %struct.RRRRRRRR* byval %agg.tmp10, %struct.RRRRRRRR* byval %agg.tmp16)

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