/prebuilts/ndk/current/platforms/android-8/arch-arm/usr/include/linux/ |
compiler-gcc.h | 12 #define barrier() __asm__ __volatile__("": : :"memory") macro
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/prebuilts/ndk/current/platforms/android-9/arch-arm/usr/include/linux/ |
compiler-gcc.h | 12 #define barrier() __asm__ __volatile__("": : :"memory") macro
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/prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/linux/ |
compiler-gcc.h | 12 #define barrier() __asm__ __volatile__("": : :"memory") macro
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/prebuilts/ndk/current/platforms/android-9/arch-x86/usr/include/linux/ |
compiler-gcc.h | 12 #define barrier() __asm__ __volatile__("": : :"memory") macro
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/prebuilts/go/darwin-x86/src/runtime/ |
mbarrier.go | 9 // emitting calls to write barriers. This file contains the actual write barrier 18 // markwb is the mark-phase write barrier, the only barrier we have. 21 // This is the Dijkstra barrier coarsened to always shade the ptr (dst) object. 22 // The original Dijkstra barrier only shaded ptrs being placed in black slots. 35 // to be noted by the write barrier. Furthermore if either 53 // Without an expensive memory barrier between the st and the ld, the final 69 // is guaranteed to execute a write barrier when it publishes the 79 // compiler will generate a write barrier for writes through that 82 // One might be tempted to ignore the write barrier if slot point [all...] |
atomic_ppc64x.s | 43 // LWSYNC is the "export" barrier recommended by Power ISA 45 // LWSYNC is a load/load, load/store, and store/store barrier.
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/prebuilts/go/linux-x86/src/runtime/ |
mbarrier.go | 9 // emitting calls to write barriers. This file contains the actual write barrier 18 // markwb is the mark-phase write barrier, the only barrier we have. 21 // This is the Dijkstra barrier coarsened to always shade the ptr (dst) object. 22 // The original Dijkstra barrier only shaded ptrs being placed in black slots. 35 // to be noted by the write barrier. Furthermore if either 53 // Without an expensive memory barrier between the st and the ld, the final 69 // is guaranteed to execute a write barrier when it publishes the 79 // compiler will generate a write barrier for writes through that 82 // One might be tempted to ignore the write barrier if slot point [all...] |
atomic_ppc64x.s | 43 // LWSYNC is the "export" barrier recommended by Power ISA 45 // LWSYNC is a load/load, load/store, and store/store barrier.
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/external/valgrind/helgrind/tests/ |
tc17_sembar.c | 8 (sem_{init,destroy,post,wait}). Using semaphores a barrier 10 the barrier semantics implied by the barrier, as pieced together 26 that the barrier-like behaviour of gomp_barrier_t is evident to 59 /* Before destroying, make sure all threads have left the barrier. */ 95 // all other threads arriving at the barrier 98 // now let all the other threads past the barrier, giving them 112 barrier have a a Thrcheck-visible dependency on all threads 113 arriving at the barrier. As required. */ 134 are arriving at the barrier and by mutex2 whilst they are leaving [all...] |
/development/ndk/platforms/android-9/arch-x86/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/external/compiler-rt/test/tsan/Darwin/ |
gcd-once.mm | 22 barrier_wait(&barrier); 40 barrier_init(&barrier, kNumThreads);
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/external/llvm/test/CodeGen/AMDGPU/ |
llvm.AMDGPU.barrier.global.ll | 15 call void @llvm.AMDGPU.barrier.global() 25 declare void @llvm.AMDGPU.barrier.global()
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llvm.AMDGPU.barrier.local.ll | 16 call void @llvm.AMDGPU.barrier.local() 26 declare void @llvm.AMDGPU.barrier.local()
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/external/skia/include/private/ |
SkSpinlock.h | 21 // To act as a mutex, we need an acquire barrier if we take the lock. 29 // To act as a mutex, we need a release barrier.
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/external/webrtc/talk/app/webrtc/java/android/org/webrtc/ |
ThreadUtils.java | 132 public static boolean awaitUninterruptibly(CountDownLatch barrier, long timeoutMs) { 139 result = barrier.await(timeRemainingMs, TimeUnit.MILLISECONDS); 164 final CountDownLatch barrier = new CountDownLatch(1); local 172 barrier.countDown(); 175 awaitUninterruptibly(barrier); 183 final CountDownLatch barrier = new CountDownLatch(1); local 187 barrier.countDown(); 190 awaitUninterruptibly(barrier);
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/frameworks/base/libs/hwui/thread/ |
Future.h | 22 #include "Barrier.h" 51 Barrier mBarrier;
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/prebuilts/ndk/current/platforms/android-12/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-13/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-14/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-15/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-16/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-17/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-18/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-19/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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/prebuilts/ndk/current/platforms/android-9/arch-x86/usr/include/asm/ |
bitops_32.h | 29 #define smp_mb__before_clear_bit() barrier() 30 #define smp_mb__after_clear_bit() barrier()
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