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  /art/runtime/entrypoints/quick/
quick_jni_entrypoints.cc 27 // Call the read barrier and update the handle.
  /art/runtime/gc/accounting/
card_table.cc 39 * Maintain a card table from the write barrier. All writes of
card_table.h 45 // Maintain a card table from the the write barrier. All writes of
  /art/runtime/
gc_root.h 194 // It's safe to null-check it without a read barrier.
thread_pool.cc 118 // Add one since the caller of constructor waits on the barrier too.
  /art/runtime/lambda/
box_table.h 89 // Also, any reads should be protected by a read barrier to always give us the "to" space address.
  /art/test/401-optimizing-compiler/src/
Main.java 79 // Loop enough iterations to hope for a crash if no write barrier
  /device/google/contexthub/firmware/src/platform/stm32f4xx/
pwr.c 17 #include <cpu/inc/barrier.h>
  /external/ImageMagick/MagickCore/
accelerate-kernels-private.h 930 // barrier
931 barrier(CLK_LOCAL_MEM_FENCE);
987 // barrier
988 barrier(CLK_LOCAL_MEM_FENCE);
    [all...]
  /external/e2fsprogs/lib/uuid/
uuid_time.c 3 * violates the UUID abstraction barrier by reaching into the guts
  /external/fio/engines/
solarisaio.c 66 * For SIGIO, we need a write barrier between the two, so that
  /external/icu/android_icu4j/src/main/java/android/icu/impl/coll/
SharedObject.java 189 * Returns the reference counter. Uses a memory barrier.
  /external/icu/icu4j/main/classes/collate/src/com/ibm/icu/impl/coll/
SharedObject.java 187 * Returns the reference counter. Uses a memory barrier.
  /external/kernel-headers/original/uapi/linux/
virtio_blk.h 118 /* Barrier before this op. */
  /external/libchrome/base/
atomicops_internals_portable.h 18 // * All Barrier variants are implemented as sequentially-consistent.
  /external/llvm/lib/Target/AArch64/
AArch64Schedule.td 80 def WriteBarrier : SchedWrite; // Memory barrier.
  /external/llvm/lib/Transforms/Scalar/
MergedLoadStoreMotion.cpp 237 /// \brief True when instruction is a hoist barrier for a load
241 /// it is considered a hoist barrier.
392 /// \brief True when instruction is a sink barrier for a store
397 /// happening it is considered a sink barrier.
  /external/llvm/unittests/Support/
ThreadPool.cpp 89 // test that async & barrier work together properly.
  /external/mesa3d/include/GL/
wglext.h     [all...]
  /external/mesa3d/src/gallium/drivers/llvmpipe/
lp_rast.c 827 pipe_barrier_wait( &rast->barrier );
837 pipe_barrier_wait( &rast->barrier );
909 pipe_barrier_init( &rast->barrier, rast->num_threads );
951 pipe_barrier_destroy( &rast->barrier );
  /external/mesa3d/src/gallium/drivers/r600/
r600_asm.h 131 unsigned barrier; member in struct:r600_bytecode_output
  /external/mesa3d/src/gallium/drivers/radeon/
AMDILBase.td 32 "Enable duplicate barrier detection(HD5XXX or later).">;
  /external/mesa3d/src/mesa/drivers/x11/
realglx.h 287 _real_glXBindSwapBarrierSGIX(Display *dpy, GLXDrawable drawable, int barrier);
  /external/opencv3/modules/core/src/opencl/
lut.cl 123 barrier(CLK_LOCAL_MEM_FENCE);
transpose.cl 103 barrier(CLK_LOCAL_MEM_FENCE);

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